An FPGA based Real-Time Video Processing system on Zynq 7010

Real-Time Image Processing involves the transformation of incoming signals, primarily from a camera, into a format that can be readily interpreted by a display device. This process is heavily reliant on precise timing constraints, demanding efficient hardware execution. This paper proposes an innovative method for interfacing the OV7670 Complementary Metal Oxide Semiconductor (CMOS) Camera with an FPGA-based Real-Time Image Processing system on a Zynq 7010 platform, using the open-source Digilent Dynamic Clock Generator. The architecture is characterized by it’s parallel processing capability of both controlling the camera output signals and processing the signals and converting them from RGB to DVI format on the fly. In lieu of the traditional PLL based clocking wizard, which provides a fixed clock signal, the open-source Dynamic Clock Generator has been incorporated in the architecture to generate the essential pixel clock, meeting the real-time clocking requirements. The RGB to DVI(Digital Visual Interface) block has been coded in VHDL to convert the output from AXI4-Stream to Video Out Xilinx IP Core to TMDS (Transition-Minimized Differential Signaling data, to be interpreted by an HDMI compatible monitor.

I. Introduction

In the realm of real-time image processing, the seamless and efficient integration of external devices, particularly cameras, with FPGA-based systems has become an increasingly crucial focus of research and development. Field-Programmable Gate Arrays (FPGAs) have gained widespread recognition for their capacity to accelerate computationally intensive tasks, making them a natural choice for applications like video processing, object detection, and image enhancement. This synergy between FPGAs and cameras has led to innovative solutions with applications ranging from autonomous vehicles to medical imaging. This paper presents a novel approach to address the challenge of real-time video processing, specifically targeting the interfacing of an OV7670 CMOS Camera with an FPGA-based Real-Time Image Processing system, operating on the Zynq 7010 platform. Departing from conventional methods employing a Phase-Locked Loop (PLL)-based clocking wizard, which typically outputs a fixed clock signal, this innovative solution uses the open-source Digilent Dynamic Clock Generator to generate a pixel clock that precisely meets the stringent demands of real-time clocking. The reason behind the inclusion of the dynamic clock generator in the architecture is to decrease the latency of the Real-time Image Processing System. The fundamental architecture distinguishes itself by its remarkable parallel processing capabilities, encompassing the concurrent management of camera output signals, signal processing, and on-the-fly conversion from RGB to DVI format.