Quantifying the Gap between Open-Source and Vendor FPGA Place and Route Tools

The use of Field Programmable Gate Arrays (FP-GAs) has increased greatly as a result of their flexibility, power efficiency, and hardware acceleration capabilities. CAD tools needed to map hardware description language (HDL) code to the FPGA are complex and challenging to build. Open-source CAD tools for FPGAs have been developed to facilitate restriction-free customization and have more control over the mapping process. A significant milestone in the development of open-source CAD tools was the ability to target real commercial devices. In recent years, multiple academic CAD tools can map circuits to commercial FPGAs. It is essential to identify and quantify the performance gap between academic and vendor tools targeting commercial devices. To this effect, we compare relevant hardware quality metrics after placement and routing for five tool-flows targeting a commercial FPGA. Our results show the divide between academic and commercial place and route tools for device utilization, run time, and maximum circuit speeds.