Threshold Voltage Extraction Method for Low-Voltage SiC MOSFETs at High-Temperature

This paper demonstrates the threshold voltage extraction method of silicon carbide (SiC) n-channel MOSFETs over temperatures. The presence of high-density traps at the SiC/SiO2 interface affects the change of threshold voltage and the channel region mobility of SiC device. To design complex integrated circuits (ICs) in a SiC process and meet extensive application requirements, accurate measurement of threshold voltage with temperature is of paramount importance. The linear extrapolation method cannot be implemented for SiC because of the difference in the transconductance curve compared to silicon (Si). The extracted threshold voltages obtained with the second derivative method are also not consistent with the increasing temperature. A slope-based approach on the logarithmic transfer curve has been proposed here to extract the threshold voltage. Multiple dies have been measured after examining different 4H-SiC CMOS wafers fabricated at Fraunhofer IISB. The 1 µm technology node is a triple well process, with a single poly and a single metal layer. Characterization results for NMOS devices with different lengths and widths are shown for temperatures 25°C, 150°C, and 300°C. The transfer characteristics of the n-channel SiC MOSFETs are measured utilizing a Keysight B1500A Semiconductor Device Parameter Analyzer. The findings of this work can be used in further investigation of the threshold voltage drift of SiC CMOS devices and the design of ICs capable of operating in harsh environments.