Design and Characterization of a Novel Transistor Outline (TO) Package With 3D Copper Frame

This paper introduces the design and characterization of a novel and cost-effective 3D double-side cooling package for a double-side patterned power device for the first time. The proposed package is based on the wire bond-less interconnect concept to improve package reliability. Special 3D copper frames are applied to achieve ultra-low package resistance and excellent thermal handling capability. The copper frame and epoxy encapsulation structure provide high voltage insulation capability and achieve different pattern interconnections on both sides of the chip. The electrical and thermal performance are analyzed experimentally.

I. Introduction

Emerging power devices such as the Bidirectional Bipolar Junction TRANsistor (B-TRAN™) [1], [2] is a double side patterned power device. However, the standard package such as TO-247 is only suitable for single side patterned power devices and the cooling is only from one side of the device. Hence current TO package is not suitable for this type of new devices [3]. On the other hand, double-side cooling packages have been used in high-power semiconductor devices such as GTO and thyristor [4]. But there is very little effort like this in TO package. Other reported double-side cooled packaging concept based on wire-bond technology and directed bonded copper (DBC) substrate. The extensive footprint of the DBC housing and wire bonds increases the parasitic inductance and decreases the thermomechanical reliability. [5]