Abstract:
A digital gate driver IC with drive pattern generation calibration technique is proposed for dependable SiC application. The proposed calibration utilizes an on-chip ADC ...Show MoreMetadata
Abstract:
A digital gate driver IC with drive pattern generation calibration technique is proposed for dependable SiC application. The proposed calibration utilizes an on-chip ADC to generate waveforms that break the trade-off between current surges and losses at multiple voltages and currents, reducing losses by 23%. Proposed DESAT with active gate allow turn-off at any driving force when overcurrent is detected. The pulse extender supports any pulse width of PWM and reads out memory.
Date of Conference: 29 October 2023 - 02 November 2023
Date Added to IEEE Xplore: 29 December 2023
ISBN Information: