PMA: A Persistent Memory Allocator with High Efficiency and Crash Consistency Guarantee | IEEE Conference Publication | IEEE Xplore

PMA: A Persistent Memory Allocator with High Efficiency and Crash Consistency Guarantee


Abstract:

Byte-addressable persistent memory (PM) exhibits salient features of low latency and high capacity. PM can be memory-mapped to the virtual address space of a process and ...Show More

Abstract:

Byte-addressable persistent memory (PM) exhibits salient features of low latency and high capacity. PM can be memory-mapped to the virtual address space of a process and be directly accessed via load and store instructions. Persistent memory allocator is a fundamental building block in PM-oriented programs, which provides dynamic memory allocation/deallocation primitives for developers to efficiently and safely leverage the PM. Different from DRAM allocators, a PM allocator needs to guarantee the integrity and consistency of metadata in the face of a crash. To this end, we propose a high-efficiency PM allocator, called PMA, with crash consistency guarantee. PMA uses a two-level memory management strategy and sets up a private memory pool for each thread to achieve low fragmentation and high concurrency. Furthermore, PMA employs per-thread write-ahead undo log to protect the integrity and consistency of metadata against crashes. PMA also designs a lightweight persistent pointer to reference an allocated persistent memory object across runtimes. PMA is implemented as an easy-to-use library that is independent of specific PM platforms. Extensive evaluation results on a real PM platform demonstrate the efficiency and efficacy of our proposed PMA, compared with state-of-the-art log-based PM allocators.
Date of Conference: 06-08 November 2023
Date Added to IEEE Xplore: 22 December 2023
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Conference Location: Washington, DC, USA

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I. Introduction

Persistent memory (PM) coalesces the high performance of DRAM and the persistence of hard disks, blurring the boundary between main memory and external storage [3], [4]. It provides near-DRAM latency and much larger capacity while also retaining data after power-off. Moreover, a user process can directly access PM via load/store instructions in the user space, without kernel involvement [1]. PM creates new opportunities for constructing a new storage architecture and building high-efficiency in-memory applications. Although the first commercial PM product, Intel Optane DC PMM [5], has been recently discontinued, researches on PM are still going on. Our work does not rely on Optane DC PMM and can be used on any other non-volatile memory platform that supports memory-mapping.

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