A compact SPI-based SRAM in 0.6um CMOS for Low-Power IoT Applications

In this study, the design and implementation of the CMOS technology's Static Random-Access Memory (SRAM) are thoroughly described. The Serial Peripheral Interface (SPI), an industry-standard serial protocol, is used for all of the SRAM's operations (read, write, and control), allowing for its compact size and low power consumption. This SRAM is best suited for Internet-of-Things (IoT) applications that require low power consumption and slow access rates, such as IoT-based environmental sensors. A 32-byte SRAM was created for demonstration purposes using 0.6um CMOS technology, and it was successfully tested for complete functionality following manufacture.