1. Introduction
Currently, there is great interest on the degradation of ultra thin MOS gate dielectrics with AC stress. Over the years, several degradation mechanisms have been proposed to explain the effects of AC stress [1]–[2]. However, no model proposed so far can consistently explain the degradation under different AC stress conditions. The goal of this work is to investigate the processes causing degradation of the dielectric in sub-micron MOSFETs with systematic measurements using bipolar stress pulses. We have mainly focused on the interface degradation mechanism in ultrathin gate oxides, and results indicate interesting physical processes identifiable through the experimental results.