Physical mechanisms for pulsed AC stress degradation in thin gate oxide MOSFETs | IEEE Conference Publication | IEEE Xplore

Physical mechanisms for pulsed AC stress degradation in thin gate oxide MOSFETs


Abstract:

An experimental study of the dielectric degradation under different AC stress conditions has been carried out using MOSFETs with 3.9 nm thick gate oxides. Bipolar and uni...Show More

Abstract:

An experimental study of the dielectric degradation under different AC stress conditions has been carried out using MOSFETs with 3.9 nm thick gate oxides. Bipolar and unipolar voltage pulses were used to stress the dielectric and interface state generation monitored. Pulse parameters (pulse levels, duty cycle, stress time, rise/fall times, and frequency) were systematically varied to understand the processes responsible for degradation. The experimental results give a good insight into the physical mechanisms responsible for interface degradation in ultra-thin gate oxides. The observations can be explained invoking carrier injection into the oxide followed by trapped-hole recombination.
Date of Conference: 12-12 July 2002
Date Added to IEEE Xplore: 07 November 2002
Print ISBN:0-7803-7416-9
Conference Location: Singapore
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1. Introduction

Currently, there is great interest on the degradation of ultra thin MOS gate dielectrics with AC stress. Over the years, several degradation mechanisms have been proposed to explain the effects of AC stress [1]–[2]. However, no model proposed so far can consistently explain the degradation under different AC stress conditions. The goal of this work is to investigate the processes causing degradation of the dielectric in sub-micron MOSFETs with systematic measurements using bipolar stress pulses. We have mainly focused on the interface degradation mechanism in ultrathin gate oxides, and results indicate interesting physical processes identifiable through the experimental results.

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References

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