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Efficient Barrett Modular Multiplication Based on Toom-Cook Multiplication | IEEE Journals & Magazine | IEEE Xplore

Efficient Barrett Modular Multiplication Based on Toom-Cook Multiplication


Abstract:

The Toom-Cook multiplier (TCM) is the most suitable method for multiplying large integers with key widths typically employed in ECC or RSA due to its computational effici...Show More

Abstract:

The Toom-Cook multiplier (TCM) is the most suitable method for multiplying large integers with key widths typically employed in ECC or RSA due to its computational efficiency. In this brief, we improve the accuracy of hardware TCM algorithm, and propose a TCM-based Barrett modular multiplication algorithm. We provide detailed mathematical proofs for the determination of parameters, error ranges, and input-output bounds, which serve to validate the robustness and reliability of our proposed algorithm. Further, the hardware architecture and the ASIC implementation results under 40nm, 65nm, 90nm process are presented. Compared with existing works, the proposed modular multiplier exhibits superior performance in terms of Area-Time-Product.
Published in: IEEE Transactions on Circuits and Systems II: Express Briefs ( Volume: 71, Issue: 2, February 2024)
Page(s): 862 - 866
Date of Publication: 11 September 2023

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I. Introduction

Public key cryptographic protocols, such as ECC and RSA, are fundamental to modern advancements in Internet security. However, as security requirements increase, extended key lengths complicate basic finite field operations, particularly modular multiplication, leading to an increase in resource overhead. To obviate the exceptionally consuming division operations implicated, Barrett modular multiplication (BMM) and Montgomery modular multiplication (MMM) algorithms are widely used [1], [2]. Despite this, the challenge of performing large bit-width multiplication remains. Among the algorithms developed for large bit-width multiplications, the FFT-based Schönhage-Strassen algorithm [3] and the more recent Fürer algorithm [4] are used for extremely large bit-width integer multiplication. The Toom-Cook multiplication (TCM) [5], with complexity , where is the bit-width and is the degree of TCM, is more appropriate. However, in TCM-2 implementations (Karatsuba multiplication) [6], when exceeds 2, the algorithm requires precise division operations [7]. This requirement poses a significant challenge to achieving performance enhancements in hardware design. Ding et al. [8] initially put forth a TCM based modular multiplier over NIST prime fields. Their design uses shift operations instead of exact divisions in the interpolation operation. Building on this, Gu and Li [9] advanced the field by integrating the Montgomery algorithm to implement a modular multiplier for arbitrary prime fields. In this brief, we improve the TCM algorithm for hardware implementation, and based on it, we propose a novel BMM algorithm. In the algorithm, we provide a new precompute method with detailed mathematical derivations to eliminate the redundant factors inherent in TCM. Additionally, these derivations facilitate the computation of parameters essential for minimizing the error range in the modular multiplication result.

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