Streaming Convolutional Neural Network FPGA Architecture for RFSoC Data Converters | IEEE Conference Publication | IEEE Xplore

Streaming Convolutional Neural Network FPGA Architecture for RFSoC Data Converters


Abstract:

This paper presents a novel Convolutional Neural Network (CNN) FPGA architecture designed to perform processing of radio data in a streaming manner without interruption. ...Show More

Abstract:

This paper presents a novel Convolutional Neural Network (CNN) FPGA architecture designed to perform processing of radio data in a streaming manner without interruption. The proposed architecture is evaluated for radio modulation classification tasks implemented on an AMD RFSoC 2x2 development board and operating in real-time. The proposed architecture leverages optimisation such as the General Matrix-to-Matrix (GEMM) transform, on-chip weights, fixed-point arithmetic, and efficient utilisation of FPGA resources to achieve constant processing of a stream of samples. The performance of the proposed architecture is demonstrated through accuracy results obtained during live modulation classification, while operating at a sampling frequency of 128 MHz before decimation. The proposed architecture demonstrates promising results for real-time, time-critical CNN applications.
Date of Conference: 26-28 June 2023
Date Added to IEEE Xplore: 07 August 2023
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Conference Location: Edinburgh, United Kingdom

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I. Introduction

Deep Learning (DL) has emerged as a powerful tool for improving Physical Layer (PHY) wireless communications. As new technologies such as 5G and 6G emerge, DL will play a crucial role in all layers of the communication stack. Previous research has shown impressive results in various DL applications for wireless communications such as channel estimation [1]–[3], signal identification [4], decoding [5], and synchronisation [6].

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References

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