Abstract:
To understand performance and energy tradeoffs in CPU–memory systems at lower geometries and new technologies, there is a need to update the processor and cache models us...Show MoreMetadata
Abstract:
To understand performance and energy tradeoffs in CPU–memory systems at lower geometries and new technologies, there is a need to update the processor and cache models used by instruction-level simulators. We improve the existing McPAT tool to support the 14-nm FinFET commercial technology, while respecting McPAT’s overall modeling methodology. We also include the results from the BOOM CPU core, synthesized with FinFET technology, into the McPAT tool to model the core components. For the first time, we extend McPAT to support the negative capacitance fin field-effect transistor (NC-FinFET), an emerging transistor technology with subthreshold swing (SS) below 60 mV/decade and unique leakage characteristics. Experiments using our FN-McPAT tool indicate that the NC-FinFET-based system is more energy-efficient relative to the FinFET-based system for memory-intensive workloads and vice versa for the compute-intensive workloads while operating at the highest voltage and frequency. In addition, we analyze the performance and energy consumption of last-level caches (LLCs) operating at various voltages and report novel insights into the energy consumption behavior for the NC-FinFET-based LLC. FN-McPAT is available for download at https://github.com/marg-tools/FN-McPAT.
Published in: IEEE Transactions on Very Large Scale Integration (VLSI) Systems ( Volume: 31, Issue: 9, September 2023)
Funding Agency:
Department of Computer Science and Engineering, Indian Institute of Technology Delhi, New Delhi, India
Divya Praneetha Ravipati (Member, IEEE) received the B.Tech. degree in electronics and communication engineering and the M.Tech. degree in VLSI system design in 2009 and 2011, respectively.
She worked at Kasura Technologies, Bangalore, in the role of System C developer for two years and at Vignan University as an Assistant Professor for one year. She is currently a Research Scholar with the Department of Computer Science a...Show More
Divya Praneetha Ravipati (Member, IEEE) received the B.Tech. degree in electronics and communication engineering and the M.Tech. degree in VLSI system design in 2009 and 2011, respectively.
She worked at Kasura Technologies, Bangalore, in the role of System C developer for two years and at Vignan University as an Assistant Professor for one year. She is currently a Research Scholar with the Department of Computer Science a...View more
Semiconductor Test and Reliability (STAR), University of Stuttgart, Stuttgart, Germany
Victor M. van Santen (Member, IEEE) received the M.Sc. degree in computer science and the Ph.D. degree from the Karlsruhe Institute of Technology (KIT), Karlsruhe, Germany, in 2014 and 2022, respectively.
He is currently a Research Group Leader at Chair for Semiconductor Test and Reliability (STAR), University of Stuttgart, Stuttgart, Germany. His research topics include microprocessor reliability estimation, circuit and t...Show More
Victor M. van Santen (Member, IEEE) received the M.Sc. degree in computer science and the Ph.D. degree from the Karlsruhe Institute of Technology (KIT), Karlsruhe, Germany, in 2014 and 2022, respectively.
He is currently a Research Group Leader at Chair for Semiconductor Test and Reliability (STAR), University of Stuttgart, Stuttgart, Germany. His research topics include microprocessor reliability estimation, circuit and t...View more
Research and Development Team, Konstanz, Hyperstone, Germany
Sami Salamin (Member, IEEE) received the B.Sc. degree in computer systems engineering and the M.Sc. degree (Hons.) in informatics from Palestine Polytechnic University (PPU), Hebron, Palestine, in 2005 and 2012, respectively, and the Ph.D. degree in engineering from the Karlsruhe Institute of Technology (KIT), Karlsruhe, Germany, in 2021.
He has been with PPU, since 2005. He is now with Hyperstone. His main research intere...Show More
Sami Salamin (Member, IEEE) received the B.Sc. degree in computer systems engineering and the M.Sc. degree (Hons.) in informatics from Palestine Polytechnic University (PPU), Hebron, Palestine, in 2005 and 2012, respectively, and the Ph.D. degree in engineering from the Karlsruhe Institute of Technology (KIT), Karlsruhe, Germany, in 2021.
He has been with PPU, since 2005. He is now with Hyperstone. His main research intere...View more
AI Processor Design, Technical University of Munich (TUM), Munich, Germany
Munich Institute of Robotics and Machine Intelligence (MIRMI), Munich, Germany
Hussam Amrouch (Member, IEEE) received the Ph.D. degree (summa cum laude) from the Karlsruhe Institute of Technology (KIT), Karlsruhe, Germany, in 2015.
He is a Professor Heading the Chair of AI Processor Design at the Technical University of Munich (TUM), Munich, Germany. He is, additionally, with the Munich Institute of Robotics and Machine Intelligence (MIRMI), Munich. Furthermore, he is the Head of the Semiconductor Te...Show More
Hussam Amrouch (Member, IEEE) received the Ph.D. degree (summa cum laude) from the Karlsruhe Institute of Technology (KIT), Karlsruhe, Germany, in 2015.
He is a Professor Heading the Chair of AI Processor Design at the Technical University of Munich (TUM), Munich, Germany. He is, additionally, with the Munich Institute of Robotics and Machine Intelligence (MIRMI), Munich. Furthermore, he is the Head of the Semiconductor Te...View more
Department of Computer Science and Engineering and the Khosla School of IT, Indian Institute of Technology Delhi, New Delhi, India
Preeti Ranjan Panda (Senior Member, IEEE) received the B.Tech. degree in computer science and engineering from the IIT Madras, Chennai, India, in 1990, and the M.S. and Ph.D. degrees from the University of California at Irvine, Irvine, CA, USA, in 1995 and 1998, respectively.
He is currently a Professor with the Department of Computer Science and Engineering at IIT Delhi, New Delhi, India. He has previously worked at Texas...Show More
Preeti Ranjan Panda (Senior Member, IEEE) received the B.Tech. degree in computer science and engineering from the IIT Madras, Chennai, India, in 1990, and the M.S. and Ph.D. degrees from the University of California at Irvine, Irvine, CA, USA, in 1995 and 1998, respectively.
He is currently a Professor with the Department of Computer Science and Engineering at IIT Delhi, New Delhi, India. He has previously worked at Texas...View more
Contents Department of Computer Science and Engineering, Indian Institute of Technology Delhi, New Delhi, India
Divya Praneetha Ravipati (Member, IEEE) received the B.Tech. degree in electronics and communication engineering and the M.Tech. degree in VLSI system design in 2009 and 2011, respectively.
She worked at Kasura Technologies, Bangalore, in the role of System C developer for two years and at Vignan University as an Assistant Professor for one year. She is currently a Research Scholar with the Department of Computer Science and Engineering, IIT Delhi. Her research interests include computer architecture, energy efficient systems, and bbreak high-performance computing.
Divya Praneetha Ravipati (Member, IEEE) received the B.Tech. degree in electronics and communication engineering and the M.Tech. degree in VLSI system design in 2009 and 2011, respectively.
She worked at Kasura Technologies, Bangalore, in the role of System C developer for two years and at Vignan University as an Assistant Professor for one year. She is currently a Research Scholar with the Department of Computer Science and Engineering, IIT Delhi. Her research interests include computer architecture, energy efficient systems, and bbreak high-performance computing.View more
Semiconductor Test and Reliability (STAR), University of Stuttgart, Stuttgart, Germany
Victor M. van Santen (Member, IEEE) received the M.Sc. degree in computer science and the Ph.D. degree from the Karlsruhe Institute of Technology (KIT), Karlsruhe, Germany, in 2014 and 2022, respectively.
He is currently a Research Group Leader at Chair for Semiconductor Test and Reliability (STAR), University of Stuttgart, Stuttgart, Germany. His research topics include microprocessor reliability estimation, circuit and transistor simulation, failure analysis, and reliability estimation with a special interest in aging phenomena.
Victor M. van Santen (Member, IEEE) received the M.Sc. degree in computer science and the Ph.D. degree from the Karlsruhe Institute of Technology (KIT), Karlsruhe, Germany, in 2014 and 2022, respectively.
He is currently a Research Group Leader at Chair for Semiconductor Test and Reliability (STAR), University of Stuttgart, Stuttgart, Germany. His research topics include microprocessor reliability estimation, circuit and transistor simulation, failure analysis, and reliability estimation with a special interest in aging phenomena.View more
Research and Development Team, Konstanz, Hyperstone, Germany
Sami Salamin (Member, IEEE) received the B.Sc. degree in computer systems engineering and the M.Sc. degree (Hons.) in informatics from Palestine Polytechnic University (PPU), Hebron, Palestine, in 2005 and 2012, respectively, and the Ph.D. degree in engineering from the Karlsruhe Institute of Technology (KIT), Karlsruhe, Germany, in 2021.
He has been with PPU, since 2005. He is now with Hyperstone. His main research interests are emerging technologies, low-power design, reliability of embedded systems, and machine learning.
Dr. Salamin has received the HiPEAC Paper Award.
Sami Salamin (Member, IEEE) received the B.Sc. degree in computer systems engineering and the M.Sc. degree (Hons.) in informatics from Palestine Polytechnic University (PPU), Hebron, Palestine, in 2005 and 2012, respectively, and the Ph.D. degree in engineering from the Karlsruhe Institute of Technology (KIT), Karlsruhe, Germany, in 2021.
He has been with PPU, since 2005. He is now with Hyperstone. His main research interests are emerging technologies, low-power design, reliability of embedded systems, and machine learning.
Dr. Salamin has received the HiPEAC Paper Award.View more
AI Processor Design, Technical University of Munich (TUM), Munich, Germany
Munich Institute of Robotics and Machine Intelligence (MIRMI), Munich, Germany
Hussam Amrouch (Member, IEEE) received the Ph.D. degree (summa cum laude) from the Karlsruhe Institute of Technology (KIT), Karlsruhe, Germany, in 2015.
He is a Professor Heading the Chair of AI Processor Design at the Technical University of Munich (TUM), Munich, Germany. He is, additionally, with the Munich Institute of Robotics and Machine Intelligence (MIRMI), Munich. Furthermore, he is the Head of the Semiconductor Test and Reliability (STAR) at the University of Stuttgart, Stuttgart, Germany. Prior to that, he was a Research Group Leader at KIT, where he was leading the research efforts in building dependable embedded systems. He currently serves as an Editor for the Nature Scientific Reports Journal. He has more than 210 publications (including 87) in multidisciplinary research areas across the computing stack, starting from semiconductor physics to circuit design all the way up to computer-aided design and computer architecture. His research in HW security and reliability has been funded by the German Research Foundation (DFG), Bonn, Germany, Advantest Corporation, Germany, and the U.S. Office of Naval Research (ONR), Arlington, VA, USA. His main research interests are design for reliability and testing from device physics to systems, machine learning for CAD, HW security, approximate computing, and emerging technologies with a special focus on ferroelectric devices.
Dr. Amrouch was a recipient of eight HiPEAC Paper Awards and three best paper nominations at top EDA conferences: DAC’16, DAC’17, and DATE’17 for his work on reliability. He has served for the technical program committees of many major EDA conferences such as DAC, ASP-DAC, and ICCAD, and as a Reviewer for many top journals such as Nature Electronics, IEEE Transactions on Electron Devices, IEEE Transactions on Circuits and Systems—I: Regular Papers, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Technology Computer Aided Design, and IEEE Transactions on Computers.
Hussam Amrouch (Member, IEEE) received the Ph.D. degree (summa cum laude) from the Karlsruhe Institute of Technology (KIT), Karlsruhe, Germany, in 2015.
He is a Professor Heading the Chair of AI Processor Design at the Technical University of Munich (TUM), Munich, Germany. He is, additionally, with the Munich Institute of Robotics and Machine Intelligence (MIRMI), Munich. Furthermore, he is the Head of the Semiconductor Test and Reliability (STAR) at the University of Stuttgart, Stuttgart, Germany. Prior to that, he was a Research Group Leader at KIT, where he was leading the research efforts in building dependable embedded systems. He currently serves as an Editor for the Nature Scientific Reports Journal. He has more than 210 publications (including 87) in multidisciplinary research areas across the computing stack, starting from semiconductor physics to circuit design all the way up to computer-aided design and computer architecture. His research in HW security and reliability has been funded by the German Research Foundation (DFG), Bonn, Germany, Advantest Corporation, Germany, and the U.S. Office of Naval Research (ONR), Arlington, VA, USA. His main research interests are design for reliability and testing from device physics to systems, machine learning for CAD, HW security, approximate computing, and emerging technologies with a special focus on ferroelectric devices.
Dr. Amrouch was a recipient of eight HiPEAC Paper Awards and three best paper nominations at top EDA conferences: DAC’16, DAC’17, and DATE’17 for his work on reliability. He has served for the technical program committees of many major EDA conferences such as DAC, ASP-DAC, and ICCAD, and as a Reviewer for many top journals such as Nature Electronics, IEEE Transactions on Electron Devices, IEEE Transactions on Circuits and Systems—I: Regular Papers, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Technology Computer Aided Design, and IEEE Transactions on Computers.View more
Department of Computer Science and Engineering and the Khosla School of IT, Indian Institute of Technology Delhi, New Delhi, India
Preeti Ranjan Panda (Senior Member, IEEE) received the B.Tech. degree in computer science and engineering from the IIT Madras, Chennai, India, in 1990, and the M.S. and Ph.D. degrees from the University of California at Irvine, Irvine, CA, USA, in 1995 and 1998, respectively.
He is currently a Professor with the Department of Computer Science and Engineering at IIT Delhi, New Delhi, India. He has previously worked at Texas Instruments, Bangalore, and Synopsys Inc., Mountain View, CA, USA, and was a Visiting Scholar at Stanford University, Stanford, CA, USA. He has authored two books.
Dr. Panda was a recipient of the IBM Faculty Award, the IESA Techno Mentor Award, and the DST Young Scientist Award. He serves as the Editor-in-Chief of IEEE Embedded Systems Letters and has served on the editorial boards of several journals including IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, ACM Transactions on Design Automation of Electronic Systems, and Springer International Journal of Parallel Programming. He has served as the Technical Program Co-Chair of CODES+ISSS and CASES, and on the Technical Program Committees of several major conferences including DAC, ICCAD, DATE, and EMSOFT.
Preeti Ranjan Panda (Senior Member, IEEE) received the B.Tech. degree in computer science and engineering from the IIT Madras, Chennai, India, in 1990, and the M.S. and Ph.D. degrees from the University of California at Irvine, Irvine, CA, USA, in 1995 and 1998, respectively.
He is currently a Professor with the Department of Computer Science and Engineering at IIT Delhi, New Delhi, India. He has previously worked at Texas Instruments, Bangalore, and Synopsys Inc., Mountain View, CA, USA, and was a Visiting Scholar at Stanford University, Stanford, CA, USA. He has authored two books.
Dr. Panda was a recipient of the IBM Faculty Award, the IESA Techno Mentor Award, and the DST Young Scientist Award. He serves as the Editor-in-Chief of IEEE Embedded Systems Letters and has served on the editorial boards of several journals including IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, ACM Transactions on Design Automation of Electronic Systems, and Springer International Journal of Parallel Programming. He has served as the Technical Program Co-Chair of CODES+ISSS and CASES, and on the Technical Program Committees of several major conferences including DAC, ICCAD, DATE, and EMSOFT.View more
