I. Introduction
Brain-machine interfaces (BMI) are pivotal for the meaningful progression of technology-driven neurological research and treatment. Continuous, unrestrained, real-time monitoring of large-scale brain neural activity supports deeper clinical understanding and the consequent treatment of neurological diseases [1], as well as the development of neuro-prostheses for restoring mobility to paralysed patients [2]. A fully integrated BMI system-on-chip (SoC) that can sense, digitize and record neural signals spanning several brain regions, with high bandwidth (via 10,000–100,000 of electrode channels [3]), maximal energy autonomy (i.e., power provided through energy harvesting solutions, allowing battery-less operation) and made implantable (requiring wireless connectivity) currently poses significant engineering challenges.