Implementation of a Robust and Power-Efficient Nonlinear 64-QAM Demapper using In-Memory Computing

Analog in-memory computing reduces power consumption sacrificing computational accuracy. We implement multiplication-accumulation in resistive RAM accounting for non-idealities (variations, quantization, ADC noise). The floating-point performance is recovered while minimizing power consumption in offline 64-QAM experiments.

1. Introduction

Nonlinear equalization and demapping are instrumental in high-speed optical communications to compensate transmission impairments. Recently, neural networks (NNs) are proposed to implement equalization and soft demapping of received symbols [5], [7], [9], [13]. NNs are suitable to implement high-speed processing in optical communications due to parallelization and the availability of large amount of training data.