A Tutorial on Double Pulse Test of Silicon and Silicon Carbide MOSFETs

In the power electronics and machine drives area, recent advancements in power electronics devices are paving a more sustainable future. The importance of improved power devices is beneficial within the growing industry, for example, Electric Vehicles. New power devices are continuously researched to combat drawbacks like loss and switching time. The electrical engineering curriculum should be supported by market-oriented knowledge and industry skills based on the market leaders' vision and recruiting plans. Our ultimate objective is to modify the power electronics modules' curriculum and reskill our graduates to satisfy the industry's needs. This paper introduces one of the topics in power electronics which was identified as an industry requirement: the Double Pulse Test (DPT), to be highlighted in future curriculums. This test will be used as a comparison tool for two power electronic devices: Silicon MOSFET (Si-MOSFET) and Silicon Carbide MOSFET (SiC-MOSFET).

I. Introduction

Nowadays, wide-bandgap semiconductors such as silicon carbide (SiC) and gallium nitride (GaN) have more attention due to their superior performance in automotive and industrial applications compared to Silicon switches [1] - [4]. The MOSFETs featured in this manuscript are the traditional Silicon (Si) MOSFET and the recent SiC-MOSFET from the enhancement mode type. The traditional n-type MOSFET is a quad-terminal device comprised of a Gate Body, Source, and Drain. The gate, a metal contact, is electrically insulated from the main body of the device with a thin oxidation layer < 100 nm of Silicon Dioxide or Silicon-Oxynitride. Applying a bias voltage to the gate controls the conducting channel width, formed below the oxidation layer and situated between the source and drain. Hence, the gate controls the flow of charge carriers from the source to the drain [5]. Wide band-gap devices such as SiC offer superior performance to their Si- based counterparts [6] -[9]. The construction process of the SiC-MOSFET is similar to Si-MOSFET. The fabrication process is advantageous as opposed to other wide band-gap materials like Gallium Nitride (GaN). More specifically, wafers of Silicon- Dioxide can be grown using thermal oxidation, a process already utilised in Silicon wafer construction [10], [11]. The proposed benefits of a Silicon- Carbide substrate over a pure Silicon substrate rely on the difference in band-gap between the materials. Pure silicon has a far smaller band-gap compared to that of Silicon-Carbide. The Si-MOSFET has an energy gap of 1.1-1.5 eV, while the SiC-MOSFET has 2 to 7 eV. Ultimately this allows Silicon- Carbide, to tolerate an electric field of approximately ten times that of pure silicon [11]. Therefore, traditional MOSFETs are restrained by the 'Silicon Limit', the optimal doping profile that provides the minimum series resistance for an Epitaxial Layer for a given breakdown voltage under set conditions. The Epitaxial Layer is the key voltage-sustaining region and is the greatest contributor to the on-state resistance of the MOSFET [12]. Accordingly, there is a need for switching devices to provide high efficiency, high switching frequency, small size, and low cost [1].