A Sub-0.8pJ/b 16.3Gbps/mm2 Universal Soft-Detection Decoder Using ORBGRAND in 40nm CMOS

Many modern communication applications demand strict latency bounds, high energy efficiency, and high bandwidth, for which only short-length, high-rate codes are suitable. Ordered Reliability Bits Guessing Random Additive Noise Decoding (ORBGRAND) is a recently proposed universal near maximum likelihood (ML) decoding algorithm [1] that can decode all short-length and high-rate codes and for which several hardware architectures have been proposed [2–3]. Those designs focused primarily on obtaining high-throughput performance at the expense of significant resource utilization. This work presents the first-integrated universal soft-detection decoder using ORBGRAND implemented in 40nm CMOS technology featuring: 1) ultra-low energy consumption of 0.76pJ/b and low power consumption of 4.9mW compared to state-of-the-art [2–6], on a small core area utilizing 0.4mm², and high fabricated throughput performance of 6.5Gbps operating at 90MHz frequency from a 1.0V nominal supply voltage at a target Frame Error Rate (FER) of 10⁻⁷; 2) ability to abandon the sorting of soft information on-the-fly with dynamic clock gating, saving power and energy, while automatically adapting its performance to channel conditions; 3) energy- and area-efficient integer partitions architecture for accurate ordered-reliability bit patterns with a Logistic Weight (LW) up to 104 and error correction up to 13b; and 4) reconfigurable architecture that supports codeword (CW) lengths between 32 to 256b.

Many modern communication applications demand strict latency bounds, high energy efficiency, and high bandwidth, for which only short-length, high-rate codes are suitable. Ordered Reliability Bits Guessing Random Additive Noise Decoding (ORBGRAND) is a recently proposed universal near maximum likelihood (ML) decoding algorithm [1] that can decode all short-length and high-rate codes and for which several hardware architectures have been proposed [2]–[3]. Those designs focused primarily on obtaining high-throughput performance at the expense of significant resource utilization. This work presents the first-integrated universal soft-detection decoder using ORBGRAND implemented in 40nm CMOS technology featuring: 1) ultra-low energy consumption of 0.76pJ/b and low power consumption of 4.9mW compared to state-of-the-art [2]–[6], on a small core area utilizing 0.4mm², and high fabricated throughput performance of 6.5Gbps operating at 90MHz frequency from a 1.0V nominal supply voltage at a target Frame Error Rate (FER) of 10⁻⁷; 2) ability to abandon the sorting of soft information on-the-fly with dynamic clock gating, saving power and energy, while automatically adapting its performance to channel conditions; 3) energy- and area-efficient integer partitions architecture for accurate ordered-reliability bit patterns with a Logistic Weight (LW) up to 104 and error correction up to 13b; and 4) reconfigurable architecture that supports codeword (CW) lengths between 32 to 256b.