I. Introduction
With the advent of the post-Moore era, system-on-chip (SoC) with higher functional integration and better performance has gradually become the mainstream of current chips, which has been widely used in consumer electronics, information technology (IT), communications and autonomous driving [1]. Under the intensified tension of global semiconductor supply chain, ensuring the security of the SoC supply chain has become increasingly important. EDA tools, known as the “mother of chips”, is an indispensable part of SoC design process, thus has a potentially serious impact on the security of the SoC supply chain.