Abstract:
With the scaling down of process, single event upset has been a critical issue for integrated circuits. It is much more likely to occur multiple-node upsets (MNUs) in CMO...Show MoreMetadata
Abstract:
With the scaling down of process, single event upset has been a critical issue for integrated circuits. It is much more likely to occur multiple-node upsets (MNUs) in CMOS ICs in advanced technology. However, the problem remains unsolved because of the lack of efficient methods. In this article, a non-redundant triple-node-upset(TNU)-tolerant latch with high reliability is proposed in 28 nm CMOS technology. The proposed latch named KOBE reduces the number of inner-sensitive nodes as well as the redundancy of the TNU-tolerant latch. In simulations, the proposed KOBE latch performs faster and lower power with higher reliability than most of the TNU-tolerant latches proposed before. The post-layout parasitic extracted simulations show that the proposed KOBE latch has an average improvement of 52.5% in a Power-Area-Delay Product (PADP) compared with the recently reported TNU-hardened latch at a supply voltage of 0.9 V, a working temperature of 27 °C. What’s more, by changing the working voltage and temperature, it is proved that the proposed KOBE latch has a better performance in a harsh environment. The results show that the proposed KOBE latch is of high beneficial efficiency and high reliability, thus can be used in safety-critical applications.
Published in: IEEE Transactions on Circuits and Systems I: Regular Papers ( Volume: 70, Issue: 4, April 2023)
Funding Agency:
State Key Laboratory of ASIC and System, Fudan University, Shanghai, China
Yan Liu received the B.S. degree in microelectronics science and engineering from East China Normal University, China, in 2019. She is currently pursuing the M.S. degree with Fudan University, China. Her current research interests include soft-error-tolerant circuit design and design automation methodology.
Yan Liu received the B.S. degree in microelectronics science and engineering from East China Normal University, China, in 2019. She is currently pursuing the M.S. degree with Fudan University, China. Her current research interests include soft-error-tolerant circuit design and design automation methodology.View more
State Key Laboratory of ASIC and System, Fudan University, Shanghai, China
Yan Li (Member, IEEE) received the B.S. degree in electronics and information engineering from Northeastern University, China, in 2015, and the M.S. and Ph.D. degrees in integrated circuits engineering from Fudan University, China, in 2017 and 2022, respectively. In 2022, he joined Fudan University, where he is currently a Post-Doctoral Researcher. His current research interests include soft-error-tolerant circuit design ...Show More
Yan Li (Member, IEEE) received the B.S. degree in electronics and information engineering from Northeastern University, China, in 2015, and the M.S. and Ph.D. degrees in integrated circuits engineering from Fudan University, China, in 2017 and 2022, respectively. In 2022, he joined Fudan University, where he is currently a Post-Doctoral Researcher. His current research interests include soft-error-tolerant circuit design ...View more
State Key Laboratory of ASIC and System, Fudan University, Shanghai, China
Xu Cheng (Member, IEEE) received the B.S. and M.S. degrees in electronics engineering from Fudan University, China, in 1999 and 2002, respectively, and the Ph.D. degree from University College Cork, Ireland, in 2007. From 2007 to 2009, he was with Cypress Semiconductor, Ireland. In 2009, he joined Fudan University, where he is currently an Associate Professor. His current research interests include energy-efficient analog...Show More
Xu Cheng (Member, IEEE) received the B.S. and M.S. degrees in electronics engineering from Fudan University, China, in 1999 and 2002, respectively, and the Ph.D. degree from University College Cork, Ireland, in 2007. From 2007 to 2009, he was with Cypress Semiconductor, Ireland. In 2009, he joined Fudan University, where he is currently an Associate Professor. His current research interests include energy-efficient analog...View more
State Key Laboratory of ASIC and System, Fudan University, Shanghai, China
Jun Han (Member, IEEE) received the B.S. degree from Xidian University, Shanxi, China, in 2000, and the Ph.D. degree in microelectronics from Fudan University, Shanghai, China, in 2006. In July 2006, he joined Fudan University, as an Assistant Professor, where he is currently a Full Professor with the State Key Laboratory of ASIC and Systems. He is working on a high-performance domain-specific processor, especially for di...Show More
Jun Han (Member, IEEE) received the B.S. degree from Xidian University, Shanxi, China, in 2000, and the Ph.D. degree in microelectronics from Fudan University, Shanghai, China, in 2006. In July 2006, he joined Fudan University, as an Assistant Professor, where he is currently a Full Professor with the State Key Laboratory of ASIC and Systems. He is working on a high-performance domain-specific processor, especially for di...View more
State Key Laboratory of ASIC and System, Fudan University, Shanghai, China
Xiaoyang Zeng (Member, IEEE) received the B.S. degree from Xiangtan University in 1996 and the Ph.D. degree (Hons.) from the Changchun Institute of Optics, Fine Mechanics and Physics, Chinese Academy of Sciences, in 2001. In 2001, he joined Fudan University, where he was a Post-Doctoral Researcher from March 2001 to February 2003. Since 2003, he has been with Fudan University, as a Faculty Member, where he is currently a ...Show More
Xiaoyang Zeng (Member, IEEE) received the B.S. degree from Xiangtan University in 1996 and the Ph.D. degree (Hons.) from the Changchun Institute of Optics, Fine Mechanics and Physics, Chinese Academy of Sciences, in 2001. In 2001, he joined Fudan University, where he was a Post-Doctoral Researcher from March 2001 to February 2003. Since 2003, he has been with Fudan University, as a Faculty Member, where he is currently a ...View more
Contents State Key Laboratory of ASIC and System, Fudan University, Shanghai, China
Yan Liu received the B.S. degree in microelectronics science and engineering from East China Normal University, China, in 2019. She is currently pursuing the M.S. degree with Fudan University, China. Her current research interests include soft-error-tolerant circuit design and design automation methodology.
Yan Liu received the B.S. degree in microelectronics science and engineering from East China Normal University, China, in 2019. She is currently pursuing the M.S. degree with Fudan University, China. Her current research interests include soft-error-tolerant circuit design and design automation methodology.View more
State Key Laboratory of ASIC and System, Fudan University, Shanghai, China
Yan Li (Member, IEEE) received the B.S. degree in electronics and information engineering from Northeastern University, China, in 2015, and the M.S. and Ph.D. degrees in integrated circuits engineering from Fudan University, China, in 2017 and 2022, respectively. In 2022, he joined Fudan University, where he is currently a Post-Doctoral Researcher. His current research interests include soft-error-tolerant circuit design and design automation methodology.
Yan Li (Member, IEEE) received the B.S. degree in electronics and information engineering from Northeastern University, China, in 2015, and the M.S. and Ph.D. degrees in integrated circuits engineering from Fudan University, China, in 2017 and 2022, respectively. In 2022, he joined Fudan University, where he is currently a Post-Doctoral Researcher. His current research interests include soft-error-tolerant circuit design and design automation methodology.View more
State Key Laboratory of ASIC and System, Fudan University, Shanghai, China
Xu Cheng (Member, IEEE) received the B.S. and M.S. degrees in electronics engineering from Fudan University, China, in 1999 and 2002, respectively, and the Ph.D. degree from University College Cork, Ireland, in 2007. From 2007 to 2009, he was with Cypress Semiconductor, Ireland. In 2009, he joined Fudan University, where he is currently an Associate Professor. His current research interests include energy-efficient analog mixed-signal design and analog CAD.
Xu Cheng (Member, IEEE) received the B.S. and M.S. degrees in electronics engineering from Fudan University, China, in 1999 and 2002, respectively, and the Ph.D. degree from University College Cork, Ireland, in 2007. From 2007 to 2009, he was with Cypress Semiconductor, Ireland. In 2009, he joined Fudan University, where he is currently an Associate Professor. His current research interests include energy-efficient analog mixed-signal design and analog CAD.View more
State Key Laboratory of ASIC and System, Fudan University, Shanghai, China
Jun Han (Member, IEEE) received the B.S. degree from Xidian University, Shanxi, China, in 2000, and the Ph.D. degree in microelectronics from Fudan University, Shanghai, China, in 2006. In July 2006, he joined Fudan University, as an Assistant Professor, where he is currently a Full Professor with the State Key Laboratory of ASIC and Systems. He is working on a high-performance domain-specific processor, especially for digital signal processing and cryptography.
Jun Han (Member, IEEE) received the B.S. degree from Xidian University, Shanxi, China, in 2000, and the Ph.D. degree in microelectronics from Fudan University, Shanghai, China, in 2006. In July 2006, he joined Fudan University, as an Assistant Professor, where he is currently a Full Professor with the State Key Laboratory of ASIC and Systems. He is working on a high-performance domain-specific processor, especially for digital signal processing and cryptography.View more
State Key Laboratory of ASIC and System, Fudan University, Shanghai, China
Xiaoyang Zeng (Member, IEEE) received the B.S. degree from Xiangtan University in 1996 and the Ph.D. degree (Hons.) from the Changchun Institute of Optics, Fine Mechanics and Physics, Chinese Academy of Sciences, in 2001. In 2001, he joined Fudan University, where he was a Post-Doctoral Researcher from March 2001 to February 2003. Since 2003, he has been with Fudan University, as a Faculty Member, where he is currently a Chair Professor and the Executing Director of the State Key Laboratory of ASIC and System. He has published more than 200 papers on international journals and conferences, such as IEEE ISSCC, IEEE Journal of Solid- State Circuits, the IEEE Transactions on Circuits and Systems— I: Regular Papers, the IEEE Transactions on Very Large Scale Integration ( VLSI) Systems, the IEEE VLSI Symposia, IEEE CICC, IEEE ESSCIRC, IEEE ASP-DAC, and IEEE A-SSCC. He has applied for more than 120 patents. His research interests include information security chips, base-band processing technologies for wireless communication, mixed-signal IC designs, and ultra-low power IC methodology.
Xiaoyang Zeng (Member, IEEE) received the B.S. degree from Xiangtan University in 1996 and the Ph.D. degree (Hons.) from the Changchun Institute of Optics, Fine Mechanics and Physics, Chinese Academy of Sciences, in 2001. In 2001, he joined Fudan University, where he was a Post-Doctoral Researcher from March 2001 to February 2003. Since 2003, he has been with Fudan University, as a Faculty Member, where he is currently a Chair Professor and the Executing Director of the State Key Laboratory of ASIC and System. He has published more than 200 papers on international journals and conferences, such as IEEE ISSCC, IEEE Journal of Solid- State Circuits, the IEEE Transactions on Circuits and Systems— I: Regular Papers, the IEEE Transactions on Very Large Scale Integration ( VLSI) Systems, the IEEE VLSI Symposia, IEEE CICC, IEEE ESSCIRC, IEEE ASP-DAC, and IEEE A-SSCC. He has applied for more than 120 patents. His research interests include information security chips, base-band processing technologies for wireless communication, mixed-signal IC designs, and ultra-low power IC methodology.View more
