3-Layer Stacked Voltage-Domain Global Shutter CMOS Image Sensor with 1.8μm-Pixel-Pitch | IEEE Conference Publication | IEEE Xplore

3-Layer Stacked Voltage-Domain Global Shutter CMOS Image Sensor with 1.8μm-Pixel-Pitch


Abstract:

A voltage-domain global shutter image sensor with 1.8μm-pixel-pitch was fabricated based on a 3-layer stacking scheme enabled by pixel-level Cu-to-Cu bonding processes. E...Show More

Abstract:

A voltage-domain global shutter image sensor with 1.8μm-pixel-pitch was fabricated based on a 3-layer stacking scheme enabled by pixel-level Cu-to-Cu bonding processes. Excellent sensor performances i.e. ultra-low parasitic light sensitivity less than -130dB, 1.8e-rms of temporal noise, and 14ke-of full-well capacity were achieved, thanks to high-capacity DRAM capacitors, dual vertical-channel transfer gates and high conversion gain (μ V/e-) in a floating diffusion node. It is, to our best knowledge, the smallest global shutter pixel ever reported with superior pixel performances.
Date of Conference: 03-07 December 2022
Date Added to IEEE Xplore: 23 January 2023
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Conference Location: San Francisco, CA, USA

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