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Pawel Rozga - IEEE Xplore Author Profile
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Pawel Rozga

Also published under: P. Rozga, Paweł Rózga

Publications
57
Citations
444
Publications by Year
20102024
Co-Authors:
Show All Co-Authors (80)
Image of author Pawel Rozga

Pawel Rozga

Also published under: P. Rozga, Paweł Rózga

Affiliation

Institute of Electrical Power Engineering - Vice-Head for Development
Lodz University of Technology
Łódz, Poland

Publication Topics

Biography

Pawel Rozga (Senior Member, IEEE) was born in Kielce, Poland, in 1979. He received the M.Sc. degree in electrical engineering from the Kielce University of Technology, Kielce, in 2003, and the Ph.D. degree in electrical engineering from the Lodz University of Technology, Łódź, Poland, in 2009.,He is currently an Associate Professor and the Vice-Director for development with the Institute of Electrical Power Engineering, Lodz University of Technology.,Dr. Rozga is the Vice-Chair of the IEEE Technical Committee on “Liquid Dielectrics” and an Associate Editor of the IEEE Transactions on Dielectrics and Electrical Insulation (TDEI).(Based on document published on 13 September 2023).
Publications
57
Citations
444
Publications by Year
20102024
Co-Authors:
Show All Co-Authors (80)
Author's Published Works

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A method for rapid screening of various low-k TDDB models

Fen Chen;Carole Graas;Michael Shinosky;Chad Burke;Kai D Feng;Craig Bocash;Ramachandran Muralidhar

2015 IEEE International Reliability Physics Symposium
Year: 2015 | Conference Paper |
Cited by: Papers (3)
Voltage or Field acceleration model is crucial for low-k TDDB reliability study and lifetime projection. Over the years, many different acceleration models have been proposed based on different physics. In this paper, a method for a relatively fast screen of various low-k TDDB models is proposed. Fast voltage ramp test to establish a relation of JE slope versus stress field is the first step. Stud...Show More

A method for rapid screening of various low-k TDDB models

Fen Chen;Carole Graas;Michael Shinosky;Chad Burke;Kai D Feng;Craig Bocash;Ramachandran Muralidhar

Year: 2015 | Conference Paper |

Investigation of emerging middle-of-line poly gate-to-diffusion contact reliability issues

Fen Chen;Steve Mittl;Michael Shinosky;Ann Swift;Rick Kontra;Brent Anderson;John Aitken;Yanfeng Wang;Emily Kinser;Mahender Kumar;Yun Wang;Terence Kane;Kai D. Feng;William K Henson;Dan Mocuta;Di-an Li

2012 IEEE International Reliability Physics Symposium (IRPS)
Year: 2012 | Conference Paper |
The minimum insulator spacing between the polysilicon control gate (PC) and the diffusion contacts (CA) in advanced VLSI circuits is aggressively shrinking due to continuous technology scaling. Meanwhile, rapid adoptions of new materials such as metal gate, epitaxial SiGe source /drain, stress liner, and copper contact together with new device configurations such as raised source/drain and FinFET ...Show More

Investigation of emerging middle-of-line poly gate-to-diffusion contact reliability issues

Fen Chen;Steve Mittl;Michael Shinosky;Ann Swift;Rick Kontra;Brent Anderson;John Aitken;Yanfeng Wang;Emily Kinser;Mahender Kumar;Yun Wang;Terence Kane;Kai D. Feng;William K Henson;Dan Mocuta;Di-an Li

Year: 2012 | Conference Paper |

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