Transient Fault Tolerance on Multicore Processor in AMP mode

Multicore processors are expected to play a key role in the future of safety critical embedded systems. Besides of performance, energy consumption and cost, reliability of multicore processor is becoming one of the most compelling factors for the critical applications. In this paper, a fault tolerance framework for multicore processor in Asymmetric Multiprocessing mode (AMP) mode is presented. This framework induces a reconstructable triple module redundant (TMR) strategy, which fully utilizes all the available cores in processor for improving reliability. The method is simulated on a FPGA based 4-core Leon3 platform. And the experiment results show that the proposed approach is able to provide higher availability and promote the multicore processor to double fail-operational.