I. Introduction
Verification and validation are typically the largest component of the design effort of a new processor. The effort can be broadly divided into two distinct disciplines, namely, functional and performance verification. The former is concerned with design correctness and has rightfully received significant attention in the literature. Even though challenging, it benefits from the availability of known correct output to compare against. Alternately, performance verification, which is typically concerned with generation-over-generation workload performance improvement, suffers from the lack of a known correct output to check against. Given the complexity of computer systems, it is often extremely difficult to accurately predict the expected performance of a given design on a given workload. Performance bugs, nevertheless, are a critical concern as the cadence of process technology scaling slows, as they rob processor designs of the primary performance and efficiency gains to be had through improved microarchitecture.