Hum Noise Suppression Using an On-chip N-path Notch Filter | IEEE Conference Publication | IEEE Xplore
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Hum Noise Suppression Using an On-chip N-path Notch Filter


Abstract:

This paper proposes an on-chip implementation of N-path notch filter for hum noise suppression. The suppression of hum noise frequency at 50 or 60 Hz requires a filter wi...Show More

Abstract:

This paper proposes an on-chip implementation of N-path notch filter for hum noise suppression. The suppression of hum noise frequency at 50 or 60 Hz requires a filter with a large time constant. The conventional N-path notch filter requires a total capacitance in the order of micro-Farads. A fully SC topology is utilized to reduce the total capacitance down to 213pF and thus enable an on-chip implementation of the filter. Simulation results show a hum noise suppression by 62.94dB with a filter notch bandwidth of 1.13Hz. The integrated output noise of the filter is 49.67μVrms.
Date of Conference: 23-25 November 2020
Date Added to IEEE Xplore: 28 December 2020
ISBN Information:
Conference Location: Glasgow, UK

Funding Agency:


References

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