Abstract:
This paper investigates the performance of cascaded h-bridge (CHB) multilevel inverter after power switch failure. A novel scheme for post-fault operation of symmetric CH...Show MoreMetadata
Abstract:
This paper investigates the performance of cascaded h-bridge (CHB) multilevel inverter after power switch failure. A novel scheme for post-fault operation of symmetric CHB inverter is proposed. In this scheme, after a power switch failure in a module, the damaged part of the faulty module is bypassed and the half operational capacity of the faulty module is used. According to the rest operational switches and modules in the inverter phases, an specific value of zero sequence voltage (ZSV) is added to the modulation voltage of phases which is a combination of a dc component and a fundamental frequency component depending on the fault status. Using the presented technique, the maximum available balanced line-to-line voltage is generated in the CHB ac terminals which means that the maximum operational capacity of the CHB is exploited under faulty condition. The performance of the presented fault tolerant technique is verified in MATLAB/SIMULINK on a 9-level CHB inverter.
Date of Conference: 04-06 August 2020
Date Added to IEEE Xplore: 26 November 2020
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