Design of High Speed, Reconfigurable Multiple ICs Tester using FPGA Platform | IEEE Conference Publication | IEEE Xplore

Design of High Speed, Reconfigurable Multiple ICs Tester using FPGA Platform


Abstract:

As the technology shrinks complexity and density are increasing. It is required to maintain the quality and reliability of the IC designed. High testing cost of these ATE...Show More

Abstract:

As the technology shrinks complexity and density are increasing. It is required to maintain the quality and reliability of the IC designed. High testing cost of these ATE machines, leads to the validation of VLSI circuits more complicated. The testers used in small scale industries and academics test single IC at a time. In this paper the authors have proposed FPGA based IC tester which is indigenous, high speed, reconfigurable easy to use. The designed IC tester has multiple IC testing capability. This FPGA based tester supports different packages like DIP and SOIC. This design suits for small scale and medium scale industries and also for academics. For determining the DUT whether it is functionally working or not, proposed IC tester sends a series of inputs to DUT, receives actual outputs from DUT and compares them with expected outputs. The proposed IC tester have advantage of testing multiple ICs at the same time with high speed of about approximate worst case 0.001 sec compared to existing testing with speed of 0.8 sec for single package. Thus the system is completely flexible for use in most small & medium-scale testing application.
Date of Conference: 14-15 December 2018
Date Added to IEEE Xplore: 20 February 2020
ISBN Information:
Conference Location: Msyuru, India

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