Abstract:
The widespread use of high definition cameras for surveillance and related tasks has given rise to the concept of edge computing as transmitting and processing video stre...Show MoreMetadata
Abstract:
The widespread use of high definition cameras for surveillance and related tasks has given rise to the concept of edge computing as transmitting and processing video streams in real time have become challenging. However, edge computing at low power and lower cost is difficult with general purpose processor hardware inside cameras. Finding a solution that meets the above requirements and demonstrates flexibility to handle diverse conditions is challenging. In this paper, we propose a coprocessor architecture which is specifically designed to perform machine vision related operations at the edge using very long instruction word (VLIW) architecture. It also supports multiple vision algorithms in the same hardware platform while supporting runtime reconfigurability, architectural flexibility, and extensibility. The system was practically realized on ZedBoard and verified for correct functionality and accuracy at 148.5 MHz. The system is capable of processing 1080p videos at 60 frames per second. Our system performs better than existing reconfigurable architectures and is on par with existing fixed architectures. The architecture can be implemented in the edge nodes of complex vision systems to increase the computational efficiency.
Published in: 2019 IEEE 30th International Conference on Application-specific Systems, Architectures and Processors (ASAP)
Date of Conference: 15-17 July 2019
Date Added to IEEE Xplore: 05 September 2019
ISBN Information: