Introduction
FinFET-based logic process technologies have been successfully used for logic platform architecture thanks to superior scalability, low power and high performance benefits [1]. Recently, the further scaling below 10nm meets a lot of challenges for multi-patterning complexity before EUV solution. In order to support cost-effective high-volume production, 8LPP is introduced to maximize the merit of well-established 10LPP production line. 44nm pitch 1x BEOL usage showed 15% area reduction by uHD cell [2]. When combining this extended multi-patterning BEOL and the further scaled FEOL process, 8LPP logic platform strongly satisfy the increasing market needs for the cost-effective, high performance, and lower power consumption. 8LPP also can fill the technology gap between the next cutting-edge technology node with high-cost production and the current 10nm line. We provide most competitive device performance and its ultra-lower operation voltage characteristics down to 0.35V, required for newly growing IOT and cyptocurrency application.