Abstract:
Using simple on-chip monitoring circuits, we precisely characterized the impact of hot carrier injection and bias temperature instability on frequency and phase noise deg...Show MoreMetadata
Abstract:
Using simple on-chip monitoring circuits, we precisely characterized the impact of hot carrier injection and bias temperature instability on frequency and phase noise degradation of a 65nm all-digital PLL circuit. Experimental data shows that PLL phase noise degrades with aging even though the output frequency is maintained constant due to the PLL feedback operation. Results show that applying high temperature annealing can recover most of the phase noise degradation.
Date of Conference: 11-15 March 2018
Date Added to IEEE Xplore: 03 May 2018
ISBN Information:
Electronic ISSN: 1938-1891