A 14.9μW analog front-end with capacitively-coupled instrumentation amplifier and 14-bit SAR ADC for epilepsy diagnosis system

This paper presents an analog front-end architecture with capacitively-coupled instrumentation amplifier and 14 bit low power SAR ADC. It is implemented in a 0.18 μm Global Foundry CMOS technology. Chopping technique is employed in the instrumentation amplifier to sustain a low input-referred noise level (1.2μV
_RMS
from 0.3Hz to 500Hz). Additionally, to compensate the non-linearity in SAR ADC, a digital calibration method with minimum area and power penalty is proposed, which is realized by the LSB-branches to digitalize the mismatch errors in MSB-branches and compensated at the output of ADC. Simulation results show that the IA has the variable gain of 128, 64, 42 and 32 respectively, and bandwidth of 1.4kHz to 7.4kHz when gain is 32, while the SAR ADC achieves 84.2dB SNDR with equivalent 13.7 ENOBs at 10kS/s sampling rate. With the supply voltage of 1.8V, the total power consumption is 14.92μW including 4.62μW of the CCIA and 10.3μW of the SAR ADC.