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Embedded package inductor for high speed SerDes design | IEEE Conference Publication | IEEE Xplore

Embedded package inductor for high speed SerDes design


Abstract:

An embedded inductor structure is introduced in the high speed IC package design. The inductor under the IC bumps serves a key signal integrity enabler for high speed IO,...Show More

Abstract:

An embedded inductor structure is introduced in the high speed IC package design. The inductor under the IC bumps serves a key signal integrity enabler for high speed IO, such as SerDes running over 10Gbps. It improves the return loss and insertion loss for high performance transceiver as well as reduces the silicon cost and resistances by replacing the on-die compensation schemes. The paper presents an overview of the construction of these inductors including representative results modeled and simulated based on the production package layout.
Date of Conference: 16-19 August 2016
Date Added to IEEE Xplore: 06 October 2016
ISBN Information:
Conference Location: Wuhan, China

References

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