High performance space VPX payload computing architecture study | IEEE Conference Publication | IEEE Xplore

High performance space VPX payload computing architecture study


Abstract:

This paper describes a functional reference design for a high-performance payload processor that captures images and spectra from multiple high-resolution instruments, pr...Show More

Abstract:

This paper describes a functional reference design for a high-performance payload processor that captures images and spectra from multiple high-resolution instruments, processes and integrates multiple real-time data streams to perform feature recognition and spatial transformations providing autonomous navigation and rendezvous capability for future spacecraft and is equally applicable to Unmanned Aerial Systems (UAS). The proposed design uses two new standards: VITA 78 (SpaceVPX) for multi-processor architecture, and RapidIO (RIO) as the interconnect fabric. The SpaceVPX standard specifies physical form factor, logical, and physical interconnect technologies and architectures that can lead to high-performance fault tolerant computing for high-performance payloads. An overview of SpaceVPX and its relationship to OpenVPX is provided as a guide to practical implementations. The proposed design features a general-purpose host processor with GPU and FPGA-based image processing hardware. RIO is used for the instrument and processor interconnects, providing multiple gigabits per second of data communication capability. An overview of RIO features and operation is presented to complement the SpaceVPX architecture. A notional Reference Architecture is proposed for analysis using multiple methods for estimating avionics performance. The study objectives are to characterize throughput, latency and sub-system utilization using conventional system analysis, hardware prototype measurements and modeling and simulation software. We conducted first-order performance studies to identify bottlenecks in memory speed, I/O capacity and processing power. Initial performance analysis was performed on memory throughput rates, producing first-order values used as a performance baseline. A model of the Reference Architecture using VisualSim Architect was created and simulations run, producing insight into the complex interactions occurring between subsystems. Furthermore, the results of a p...
Date of Conference: 05-12 March 2016
Date Added to IEEE Xplore: 30 June 2016
Electronic ISBN:978-1-4673-7676-1
Conference Location: Big Sky, MT
Author image of Richard Alena
NASA Ames Research Center, CA
Richard L. Alena is a Computer Engineer in the Intelligent Systems Division al NASA Ames. He was a Co-investigator for Wireless Sensor Networks aboard the SOAREX-8 mission in 2015. Mr. Alena worked on the Ground Data System and performed Communications Anaiysis during operations for the LCROSS Lunar Mission and on avionics and software architectures for Lunar Surface Systems for human missions. He was the chief architect ...Show More
Richard L. Alena is a Computer Engineer in the Intelligent Systems Division al NASA Ames. He was a Co-investigator for Wireless Sensor Networks aboard the SOAREX-8 mission in 2015. Mr. Alena worked on the Ground Data System and performed Communications Anaiysis during operations for the LCROSS Lunar Mission and on avionics and software architectures for Lunar Surface Systems for human missions. He was the chief architect ...View more
Author image of Patrick Collier
Air Force Research Laboratory, Albuquerque, NM
Charles Patrick Collier is a Senior Electrical Research Engineer with the Air Force Research Laboratory Space Vehicles Directorate. He was the Fiber Optic Tech Lead for a Multi-Access Laser Communication within TSAT. He is the Technical Advisor for the Space Communications Program with a primary focus on satellite based networks, photonics, and free space laser communications. Patrick is currently the Program Manager/Chai...Show More
Charles Patrick Collier is a Senior Electrical Research Engineer with the Air Force Research Laboratory Space Vehicles Directorate. He was the Fiber Optic Tech Lead for a Multi-Access Laser Communication within TSAT. He is the Technical Advisor for the Space Communications Program with a primary focus on satellite based networks, photonics, and free space laser communications. Patrick is currently the Program Manager/Chai...View more
Author image of Mohammad Ahkter
Integrated Device Technology Corp., Ottawa, Ontario, Canada
Mohammad Akhter is Director of Architecture with the Interface and Connectivity Division of Integrated Device Technology (IDT) Corp. He has more than 17 years of experience in mobile and satellite communications, as a research engineer, air-interface and modem developer, and system architect covering satellite systems (Intelsat, Inmarsat, ICO, DVB-S/S2), computing architectures, and wireless access networks (LTE/LTE-A/C-R...Show More
Mohammad Akhter is Director of Architecture with the Interface and Connectivity Division of Integrated Device Technology (IDT) Corp. He has more than 17 years of experience in mobile and satellite communications, as a research engineer, air-interface and modem developer, and system architect covering satellite systems (Intelsat, Inmarsat, ICO, DVB-S/S2), computing architectures, and wireless access networks (LTE/LTE-A/C-R...View more
Author image of Soumik Sinharoy
Integrated Device Technology Corp., Ottawa, Ontario, Canada
Barry Wood is a Principal Product Applications Engineer with the Interface and Connectivity Division of IDT. He worked in Nortel Networks Digital Multiplex Switch (DMS) product line for 10 years, developing firmware and software for fault tolerant compute platforms. While at IDT, he led the Systems Engineering software team, held the post of Architect for Tundra's Gen1 RapidIO switches, and eventually moved to the Applica...Show More
Barry Wood is a Principal Product Applications Engineer with the Interface and Connectivity Division of IDT. He worked in Nortel Networks Digital Multiplex Switch (DMS) product line for 10 years, developing firmware and software for fault tolerant compute platforms. While at IDT, he led the Systems Engineering software team, held the post of Architect for Tundra's Gen1 RapidIO switches, and eventually moved to the Applica...View more
Author image of Deepak Shankar
Orange Silicon Valley, San Francisco, CA
Soumik Sinharoy is a Senior Product Manager at Orange Silicon Valley, an innovation subsidiary of telecommunications giant Orange. He has over 15 years of IT experience and more than a decade of experience in the telecom industry. He was the co-lead for real field trial of world's first 40 Gbps global range InfiniBand with U.S. Department of Energy. He was instrumental in evangelizing that GPU accelerated analytics as the...Show More
Soumik Sinharoy is a Senior Product Manager at Orange Silicon Valley, an innovation subsidiary of telecommunications giant Orange. He has over 15 years of IT experience and more than a decade of experience in the telecom industry. He was the co-lead for real field trial of world's first 40 Gbps global range InfiniBand with U.S. Department of Energy. He was instrumental in evangelizing that GPU accelerated analytics as the...View more

Author image of Richard Alena
NASA Ames Research Center, CA
Richard L. Alena is a Computer Engineer in the Intelligent Systems Division al NASA Ames. He was a Co-investigator for Wireless Sensor Networks aboard the SOAREX-8 mission in 2015. Mr. Alena worked on the Ground Data System and performed Communications Anaiysis during operations for the LCROSS Lunar Mission and on avionics and software architectures for Lunar Surface Systems for human missions. He was the chief architect of a flight experiment conducted aboard Shuttle and Mir using laptop computers, personal digital assistants and servers in a wireless network for the ISS. He was group lead for Intelligent Mobile Technologies, developing planetary exploration systems for field simulations. Mr. Alena holds an M.S. in Electrical Engineering and Computer Science from the University of California, Berkeley. He is the winner of the Ames Honor Award for Engineering in 2010, NASA Silver Snoopy Award, numerous NASA Group Achievement Awards and a Space Flight Awareness Award.
Richard L. Alena is a Computer Engineer in the Intelligent Systems Division al NASA Ames. He was a Co-investigator for Wireless Sensor Networks aboard the SOAREX-8 mission in 2015. Mr. Alena worked on the Ground Data System and performed Communications Anaiysis during operations for the LCROSS Lunar Mission and on avionics and software architectures for Lunar Surface Systems for human missions. He was the chief architect of a flight experiment conducted aboard Shuttle and Mir using laptop computers, personal digital assistants and servers in a wireless network for the ISS. He was group lead for Intelligent Mobile Technologies, developing planetary exploration systems for field simulations. Mr. Alena holds an M.S. in Electrical Engineering and Computer Science from the University of California, Berkeley. He is the winner of the Ames Honor Award for Engineering in 2010, NASA Silver Snoopy Award, numerous NASA Group Achievement Awards and a Space Flight Awareness Award.View more
Author image of Patrick Collier
Air Force Research Laboratory, Albuquerque, NM
Charles Patrick Collier is a Senior Electrical Research Engineer with the Air Force Research Laboratory Space Vehicles Directorate. He was the Fiber Optic Tech Lead for a Multi-Access Laser Communication within TSAT. He is the Technical Advisor for the Space Communications Program with a primary focus on satellite based networks, photonics, and free space laser communications. Patrick is currently the Program Manager/Chair for the VITA 78 (SpaceVPX), VITA 78.1 (SpaceVPXLite), and the RapidIO Space Device Class efforts. He is also the current Technical Lead for the System Open System Architecture.
Charles Patrick Collier is a Senior Electrical Research Engineer with the Air Force Research Laboratory Space Vehicles Directorate. He was the Fiber Optic Tech Lead for a Multi-Access Laser Communication within TSAT. He is the Technical Advisor for the Space Communications Program with a primary focus on satellite based networks, photonics, and free space laser communications. Patrick is currently the Program Manager/Chair for the VITA 78 (SpaceVPX), VITA 78.1 (SpaceVPXLite), and the RapidIO Space Device Class efforts. He is also the current Technical Lead for the System Open System Architecture.View more
Author image of Mohammad Ahkter
Integrated Device Technology Corp., Ottawa, Ontario, Canada
Mohammad Akhter is Director of Architecture with the Interface and Connectivity Division of Integrated Device Technology (IDT) Corp. He has more than 17 years of experience in mobile and satellite communications, as a research engineer, air-interface and modem developer, and system architect covering satellite systems (Intelsat, Inmarsat, ICO, DVB-S/S2), computing architectures, and wireless access networks (LTE/LTE-A/C-RAN). He is participating in the ETSI edge computing and RapidIO coherent scale-out working group to realize the vision of next-generation low-latency access network through the convergence of high performance computing and data-path architecture. While at IDT, Mohammad has played a key role in developing the RapidIO fabric and compression architectures and the cloud based heterogeneous system for highly scalable deep learning analytics framework as part of the IDT open HPAC Lab. He is currently a member of the IEEE.
Mohammad Akhter is Director of Architecture with the Interface and Connectivity Division of Integrated Device Technology (IDT) Corp. He has more than 17 years of experience in mobile and satellite communications, as a research engineer, air-interface and modem developer, and system architect covering satellite systems (Intelsat, Inmarsat, ICO, DVB-S/S2), computing architectures, and wireless access networks (LTE/LTE-A/C-RAN). He is participating in the ETSI edge computing and RapidIO coherent scale-out working group to realize the vision of next-generation low-latency access network through the convergence of high performance computing and data-path architecture. While at IDT, Mohammad has played a key role in developing the RapidIO fabric and compression architectures and the cloud based heterogeneous system for highly scalable deep learning analytics framework as part of the IDT open HPAC Lab. He is currently a member of the IEEE.View more
Author image of Soumik Sinharoy
Integrated Device Technology Corp., Ottawa, Ontario, Canada
Barry Wood is a Principal Product Applications Engineer with the Interface and Connectivity Division of IDT. He worked in Nortel Networks Digital Multiplex Switch (DMS) product line for 10 years, developing firmware and software for fault tolerant compute platforms. While at IDT, he led the Systems Engineering software team, held the post of Architect for Tundra's Gen1 RapidIO switches, and eventually moved to the Applications Engineering team. Barry has also contributed to many areas of the RapidIO specification, including the 3.1 revision, which contains features developed by the RapidIO NGSIS Task Group for space and terrestrial applications. Barry is currently the Chair of the RapidIO Technical Working Group, and Chair of the Software Task Group.
Barry Wood is a Principal Product Applications Engineer with the Interface and Connectivity Division of IDT. He worked in Nortel Networks Digital Multiplex Switch (DMS) product line for 10 years, developing firmware and software for fault tolerant compute platforms. While at IDT, he led the Systems Engineering software team, held the post of Architect for Tundra's Gen1 RapidIO switches, and eventually moved to the Applications Engineering team. Barry has also contributed to many areas of the RapidIO specification, including the 3.1 revision, which contains features developed by the RapidIO NGSIS Task Group for space and terrestrial applications. Barry is currently the Chair of the RapidIO Technical Working Group, and Chair of the Software Task Group.View more
Author image of Deepak Shankar
Orange Silicon Valley, San Francisco, CA
Soumik Sinharoy is a Senior Product Manager at Orange Silicon Valley, an innovation subsidiary of telecommunications giant Orange. He has over 15 years of IT experience and more than a decade of experience in the telecom industry. He was the co-lead for real field trial of world's first 40 Gbps global range InfiniBand with U.S. Department of Energy. He was instrumental in evangelizing that GPU accelerated analytics as the next evolution towards enterprise databases. He currently pursues applied research in the field of High Performance Computing, High Performance Edge Analytics and applied Artificial Intelligence for Unmanned Systems and future Space Vehicles. He also evangelizes the vision of future of supercomputing via various real life demonstrations at conferences in collaboration with industry partners. Mr. Sinharoy holds a degree in Computer Science and Engineering from University of South Carolina.
Soumik Sinharoy is a Senior Product Manager at Orange Silicon Valley, an innovation subsidiary of telecommunications giant Orange. He has over 15 years of IT experience and more than a decade of experience in the telecom industry. He was the co-lead for real field trial of world's first 40 Gbps global range InfiniBand with U.S. Department of Energy. He was instrumental in evangelizing that GPU accelerated analytics as the next evolution towards enterprise databases. He currently pursues applied research in the field of High Performance Computing, High Performance Edge Analytics and applied Artificial Intelligence for Unmanned Systems and future Space Vehicles. He also evangelizes the vision of future of supercomputing via various real life demonstrations at conferences in collaboration with industry partners. Mr. Sinharoy holds a degree in Computer Science and Engineering from University of South Carolina.View more
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