FPGA implementation of Fast Fourier Transform

The Fast Fourier Transform is one of the most widely used digital signal processing algorithms. It is used to compute the Discrete Fourier Transform and its inverse. As a result, these are widely used for many applications in engineering, science, and mathematics which include areas such as: communications, signal processing, instrumentation, biomedical engineering, numerical methods, sonics and acoustics, and applied mechanics. It is described as the most important numerical algorithm of our lifetime. The number of applications for this transform continues to grow. The Decimation-In-Time radix-2 FFT using butterflies is designed. The butterfly operation is faster. The outputs of the shorter transforms are reused to compute many outputs, thus the total computational cost becomes less. The 16 bit and 32 bit inputs are synthesized using Verilog. The logic utilization obtained from the design summary of 16 and 32 bit radix-2 DIT FFT can be compared. The utilization factor increases as the number of bits increases. The design is developed using hardware description language Verilog on Xilinx 14.2 xc3s500E. The spartan3-tyro plus is used as hardware to implement the complex FFT values.