Loading [MathJax]/extensions/MathZoom.js
Design and performance analysis of reversible logic based ALU using hybrid single electron transistor | IEEE Conference Publication | IEEE Xplore

Design and performance analysis of reversible logic based ALU using hybrid single electron transistor


Abstract:

The Co-integration of SET (Single Electron Transistor) and CMOS is the new evolution for the stunning growth in modern semiconductor industry. In the present work we have...Show More

Abstract:

The Co-integration of SET (Single Electron Transistor) and CMOS is the new evolution for the stunning growth in modern semiconductor industry. In the present work we have demonstrated that the successful implementation of ALU (Arithmetic Logic Unit) using hybrid SET-CMOS and hybrid SET-CMOS based Reversible logic gates. We have represented the simulation output of the both cases and a comparison has made between different design methods. The experimental delay measurement has also been presented. All the simulations are done using Hybrid SET-CMOS technology with the help of MIB and BSIM4.6.1 model in tanner environment to realize the better performance.
Date of Conference: 06-08 March 2014
Date Added to IEEE Xplore: 17 April 2014
ISBN Information:
Conference Location: Chandigarh, India

References

References is not available for this document.