A Testing Technique for ULSI Memory with On-chip Voltage Down Converter | IEEE Conference Publication | IEEE Xplore

A Testing Technique for ULSI Memory with On-chip Voltage Down Converter


First Page of the Article

Date of Conference: 20-24 September 1995
Date Added to IEEE Xplore: 06 August 2002
Print ISBN:0-7803-0760-7
Print ISSN: 1089-3539
Conference Location: Baltimore, MD, USA

First Page of the Article


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