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High-Density STT-Assisted SOT-MRAM (SAS-MRAM) for Energy-Efficient AI Application | IEEE Conference Publication | IEEE Xplore

High-Density STT-Assisted SOT-MRAM (SAS-MRAM) for Energy-Efficient AI Application


Abstract:

To enhance the energy efficiency and areal density of future computing systems, spin-orbit torque magnetoresistive random access memory (SOT-MRAM) and its variants are be...Show More

Abstract:

To enhance the energy efficiency and areal density of future computing systems, spin-orbit torque magnetoresistive random access memory (SOT-MRAM) and its variants are being explored as emerging nonvolatile memory technologies. These technologies offer static random access memory (SRAM)-like performance at a higher bit-cell density. Here, we present a high-density, field-free spin-transfer torque (STT)-assisted SOT-MRAM (SAS-MRAM) as a potential replacement for last-level cache SRAM. This SAS-MRAM boasts high speed, high cell density, and high endurance. These benefits are achieved by sharing the SOT line between one or multiple magnetic tunnel junctions (MTJs), thereby reducing the areal and energy costs of the SOT drive transistor across multiple bits. Experimental demonstrations on 4-bit MTJs sharing an SOT line with different polarities verify the novel SAS-MRAM writing scheme, which overcomes unique disturb modes in the shared SOT line structure. Furthermore, this writing scheme enables simultaneous, field-free switching of multiple MTJs. The high-density SAS-MRAM offers significant advantages for energy-efficient computing, such as in AI applications.
Date of Conference: 05-07 August 2024
Date Added to IEEE Xplore: 15 October 2024
ISBN Information:
Conference Location: Berkeley, CA, USA

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