Abstract:
In this study, we present a vertical bypass resistive random access memory (VB-RRAM) that integrates interface-type resistive switching RRAM with excellent memory charact...Show MoreMetadata
Abstract:
In this study, we present a vertical bypass resistive random access memory (VB-RRAM) that integrates interface-type resistive switching RRAM with excellent memory characteristics for V-NAND applications. The VB-RRAM combines a resistivity switching (RS) layer, serving as memory, with a transistor selector to enable V-NAND operations. The device operates through bypass reading between the transistor and the RS layer. Therefore, through materials engineering, we optimized the resistance ratio among components by varying the {V}_{o} concentration in the IGZO transistor, adjusting the stoichiometry of the WOx RS layer, and modifying the ion conduction barrier in HfOx electrolyte layer. Furthermore, we demonstrated that bypass reading is dependent on the RS states and memory characteristics are attributed to the RS layer with electrochemical reaction, resulting in low-voltage operation (<5 V), robust multilevel cell (MLC) operation (>4 bits), and reliable retention characteristics (~107 s). In addition, we addressed the key vertical integration issues, such as isolation layer (IL) thickness and read disturbance issue to guarantee reliable V-NAND operations. By integrating a vertical structure with a 30-nm channel length, we achieved the excellent memory performance, including a high ON/OFF ratio (>105), stable endurance (>107 cycles), fast switching speed ( \lt 50 \; \mu s), and low energy consumption (<5 fJ), demonstrating the remarkable scalability of bypass RRAM.
Published in: IEEE Transactions on Electron Devices ( Volume: 71, Issue: 12, December 2024)