Abstract:
A technique for creating energy-efficient encoders, specifically for FPGA families, is presented in this research work. In conventional systems, energy optimization is of...Show MoreMetadata
Abstract:
A technique for creating energy-efficient encoders, specifically for FPGA families, is presented in this research work. In conventional systems, energy optimization is often overlooked despite being a critical component of encoder designs, especially when power is limited. Optimize topologies to reduce power consumption without compromising speed or functionality by utilizing the special features of FPGA. utilizing thorough synthesis and simulations. This article provides validation of the methodology's effectiveness in producing notable power reductions without sacrificing performance. This breakthrough not only helps to develop FPGA-based circuits but also energy reductions in many application areas.
Date of Conference: 26-27 July 2024
Date Added to IEEE Xplore: 18 September 2024
ISBN Information: