Abstract:
Since quantum computers are not readily available, much quantum computing research such as quantum algorithm verification has to be conducted on classical computer platfo...Show MoreMetadata
Abstract:
Since quantum computers are not readily available, much quantum computing research such as quantum algorithm verification has to be conducted on classical computer platforms. While many quantum circuit simulators have been developed on CPUs and GPUs, the potential of FPGAs as a platform with parallel computing capabilities and high energy efficiency has not been fully explored. This paper describes a novel approach with two modes of data movement optimization for an FPGA-based parallel pipelined dataflow architecture targeting a compact computation format. A data decoupling method is adapted to partition computing tasks and data into non-interacting sub- sets, significantly reducing external data interaction overhead. The proposed approach shows significant promise in improving performance and energy efficiency compared with existing state vector based CPU, GPU, and FPGA implementations.
Published in: 2024 IEEE 32nd Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM)
Date of Conference: 05-08 May 2024
Date Added to IEEE Xplore: 03 September 2024
ISBN Information:
ISSN Information:
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