Abstract:
Floating-point dot product is widely used in various applications. A conventional discrete construction of multipliers and adders often leads to accumulated errors and lo...Show MoreMetadata
Abstract:
Floating-point dot product is widely used in various applications. A conventional discrete construction of multipliers and adders often leads to accumulated errors and lower speed. This paper presents a floating-point eight-term fused dot product unit with mantissa-aware hardware design to attack these problems. In the proposed design, multiplication and addition of numbers are operated in a fused manner with exception controller. A pre-shift and post-shift combined scheme for mantissa alignment is utilized to eliminate the latency between significand multiplication and mantissa alignment. A one-path mantissa compress and addition structure is employed that can effectively reduce the footprint. An impact of internal mantissa datapath width on calculation accuracy is analyzed. Compared to the discrete method, the proposed design delivers a significant reduction up to 45.7%, 26.9%, and 33.0%, in terms of latency, area, and power, respectively.
Date of Conference: 19-22 May 2024
Date Added to IEEE Xplore: 02 July 2024
ISBN Information: