A software technique to enhance register utilization of Convolutional Neural Networks on GPGPUs

CNNs (Convolutional Neural Networks) have demonstrated superior results in a wide range of applications. However, the time-consuming convolution operations required by CNNs pose great challenges to designers. GPGPUs (General Purpose Graphic Processing Units) have been widely used to exploiting the massive parallelism of convolution operations. This paper proposes a software-based loop-unrolling technique to enhance the data usage on the registers and significantly improve the overall performance. The experimental results on a cycle-accurate GPGPU simulator have shown that the proposed technique can achieve up to 71% performance enhancement when compared with the reference design.