MeSAP: A fast analytic power model for DRAM memories | IEEE Conference Publication | IEEE Xplore

MeSAP: A fast analytic power model for DRAM memories


Abstract:

The design of an energy-efficient memory subsystem is one of the key issues that system architects face today. To achieve this goal, architects usually rely on system sim...Show More

Abstract:

The design of an energy-efficient memory subsystem is one of the key issues that system architects face today. To achieve this goal, architects usually rely on system simulators and trace-based DRAM power models. However, their long execution time makes the approach infeasible for the design-space exploration of next-generation exascale computing systems. Analytic models, in contrast, are orders of magnitude faster. In this paper, we propose a new analytic memory-scheduler-agnostic power model for DRAM, henceforth referred to as MeSAP. Similarly to state-of-the-art trace-based approaches, our analytic model achieves an average error of 20%, while being an order of magnitude faster. Furthermore, we integrate MeSAP into an analytic performance model of general-purpose processors and show its applicability to the design of a computing system targeting scientific image processing applications.
Date of Conference: 27-31 March 2017
Date Added to IEEE Xplore: 15 May 2017
ISBN Information:
Electronic ISSN: 1558-1101
Conference Location: Lausanne, Switzerland

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