Abstract:
By using an adaptive technique similar to the joint explicit time delay estimator, a novel variable step-size algorithm is derived. This algorithm employs the iteration t...Show MoreMetadata
Abstract:
By using an adaptive technique similar to the joint explicit time delay estimator, a novel variable step-size algorithm is derived. This algorithm employs the iteration time to control the step-size update and its respective performance analysis is also given. It is also proved that the proposed algorithm efficiently improves the convergence speed and the delay variance with only increasing a little computational cost compared to the conventional adaptive time delay estimation algorithm.
Published in: IEEE Transactions on Circuits and Systems II: Express Briefs ( Volume: 64, Issue: 8, August 2017)