Dual-mode CMOS analog front-end (AFE) for electrical impedance spectroscopy (EIS) systems

This paper presents the operation of a dual-mode wideband CMOS analog front-end (AFE) for electrical impedance spectroscopy. The chip combines two current-readout (CR) channels and four voltage-readout (VR) channels suitable for both bipolar and tetrapolar EIS analysis. The chip addresses the need for flexible readout units for real-time simultaneous single-cell and large scale tissue/organ analysis. Postlayout simulations show that the VR channel is capable of wideband operation up to 12 MHz with noise floor as low as 16.4 nV/Hz
^1/2
. A 2-bit control allows to select between a high-frequency low-gain channel and a bandwidth-limited high-gain channel. Each VR channel occupies an area of 0.48 mm
²
. The CR channel is capable of 80 dB of dynamic range, by converting currents between 1 nA to 10μA, while achieving a noise floor of 1.4 pA/Hz
^1/2
. An automatic gain control (AGC) unit can be enabled in order maintain the sensor signal within the ADC dynamic range. Each CR channel occupies an area of 0.21 mm
²
. The chip consumes between 290 μA and 690 μA per channel and operates from a 1.8 V supply. The chip will be part of a fully flexible and configurable dual-mode EIS systems for impedance sensors and bioimpedance analysis.