Abstract:
An efficient method is described for using fault simulation as a solution to the diagnostic problem created by the presence of embedded memories in BIST designs. The idea...Show MoreMetadata
Abstract:
An efficient method is described for using fault simulation as a solution to the diagnostic problem created by the presence of embedded memories in BIST designs. The idea is to create simulation models that only use combinational logic (i.e., the memory is removed).
Date of Conference: 02-04 December 1998
Date Added to IEEE Xplore: 06 August 2002
Print ISBN:0-8186-8277-9
Print ISSN: 1081-7735
