Rapid-prototyping of a CAN-Bus controller: a case study

In this paper we investigate the prototype generation of a basic CAN-Bus controller. The controller is modeled as a hierarchical finite-state-machine from which a behavioral VHDL description is generated automatically. After synthesis the device is prototyped using a FPGA-based emulating system. An experimental CAN-Bus system is presented for design validation. We show that this rapid-prototyping approach, which exclusively uses commercial hard- and software, is feasible and has been successful in two respects. The turnaround time for prototyping has been reduced significantly from 2 months for ASIC fabrication to 10 hours while achieving an operation frequency for the very first prototype totalling one fourth of that of the anticipated final system.