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A high performance CMOS LNA for system-on-chip GPS | IEEE Conference Publication | IEEE Xplore

A high performance CMOS LNA for system-on-chip GPS


Abstract:

A 1.6 GHz CMOS single-ended low noise amplifier (LNA) optimized for integration and use in Global Positioning System (GPS) applications is presented. The LNA is implement...Show More

Abstract:

A 1.6 GHz CMOS single-ended low noise amplifier (LNA) optimized for integration and use in Global Positioning System (GPS) applications is presented. The LNA is implemented in a 0.13 mum standard CMOS process with on-chip inductors. The LNA achieves a noise figure of 1.35 dB, a power gain of 16.7 dB and a 1 dB compression point of -14 dBm at a current consumption of 8.5 mA from a 1.8 V supply. The penalty of digital crosstalk on the noise figure is measured to 0.2 dB.
Date of Conference: 12-15 December 2006
Date Added to IEEE Xplore: 14 January 2008
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Conference Location: Yokohama, Japan
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