Protecting Analog Circuits Using Switch Mode Time Domain Locking

Analog circuits remain vulnerable to different types of supply chain attacks including piracy, overproduction, counterfeiting, and reverse engineering. In this article, we present switch mode time domain locking (SMDL) technique to protect analog circuits. This technique integrates a locking mechanism into the time-domain functionality of the circuit. It uses random-key-based switching phases for analog circuits instead of fixed clocks that are conventionally used. The random switching phases are dependent on a key which can be made arbitrarily long. A correct key (CK) with correct alignment of phases can unlock circuit functionality. The locking technique can be applied to a variety of switch-mode analog circuits such as filters, amplifiers, regulators, among others. We implemented this technique on a folded cascode amplifier (FCA) and on a switched-capacitor bandgap reference (BGR) circuit. In both techniques, we employ a 128-bit key to lock the circuit functionality. The design is implemented in a 65-nm CMOS technology. An incorrect key (IK) introduces almost 100% variation in the circuit functionality, ensuring high level of security.