Abstract:
In this paper, an interferer-tolerant receiver for the first group of ultra-wideband systems (3.1-4.8 GHz) is presented. The entire system operates in two modes; detectin...Show MoreMetadata
Abstract:
In this paper, an interferer-tolerant receiver for the first group of ultra-wideband systems (3.1-4.8 GHz) is presented. The entire system operates in two modes; detecting and receiving. In the detecting mode, the locations of up to three blockers in 2.35-2.75 GHz and 5.1-5.9 GHz bands are reported to three notch filters used in the receiving path for rejection. In the receiving mode, the receiver operates normally with the activated notch filters. The entire system is integrated in a standard TSMC CMOS 65-nm technology and consumes up to 23.8 mW and 9.6 mW, in the receiving and detecting modes, respectively, with a 1 V voltage supply. The receiver can achieve an out-of-band IIP3 of as high as 18.9 dBm.
Date of Conference: 04-06 June 2017
Date Added to IEEE Xplore: 07 July 2017
ISBN Information:
Electronic ISSN: 2375-0995