Towards high-k integration with III-V channels: Interface optimization of high pressure sputtered gadolinium oxide on indium phospide

We studied the electrical properties of metal-oxide-semiconductor devices based on Gd
₂
O
₃
deposited on InP by high pressure sputtering and a novel plasma oxidation process. The resulting devices show fully functional capacitance curves., indicating an unpinned Fermi level. The samples were annealed in forming gas at temperatures up to 550°C. We studied the interface trap density of the devices. We found out that with increasing annealing temperature the defect content decreases but at 550°C the capacitance drops and the leakage current increases., indicating a dielectric degradation.