Fractional Frequency Synthesizers With Low Order Time-Variant Digital Sigma-Delta Modulator

This paper proposes the use of a digital
$\Sigma\Delta$
modulator with pseudorandom variation of coefficients. The method improves PLL-based Fractional Frequency Synthesizer's performance while using a low order digital
$\Sigma\Delta$
modulator. The time variant coefficients, in a low order digital
$\Sigma\Delta$
modulator, significantly enlarge the pseudorandom output pattern period thus avoiding critical spur tones in the fractional synthesizer's phase-noise. Behavioral simulations let us verify that the proposed technique operates better than a higher order modulator with additive dither. With a low order
$\Sigma\Delta$
architecture, the programmable divider phase-selection logic and frequency range of operation parameters can be relaxed.