IEEE Transactions on Circuits and Systems I: Regular Papers

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Publication Year: 2016, Page(s):C1 - C4
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• IEEE Transactions on Circuits and Systems—I:Regular Papers publication information

Publication Year: 2016, Page(s): C2
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• Variable-Mirror Amplifier: A New Family of Process-Independent Class-AB Single-Stage OTAs for Low-Power SC Circuits

Publication Year: 2016, Page(s):1101 - 1110
Cited by:  Papers (6)
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This paper presents a new family of Class-AB operational transconductance amplifier (OTA) circuits based on single-stage topologies with non-linear current amplifiers. The proposed variable-mirror amplifier (VMA) architecture is mainly characterized by generating all Class-AB current in the output transistors only, by exhibiting very low sensitivity to both technology and temperature deviations, a... View full abstract»

• A Fractional-N DPLL With Calibration-Free Multi-Phase Injection-Locked TDC and Adaptive Single-Tone Spur Cancellation Scheme

Publication Year: 2016, Page(s):1111 - 1122
Cited by:  Papers (2)
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This paper proposes a fractional-N digital phase locked loop (DPLL) architecture with calibration-free multi-phase injection-locked time-to-digital converter (TDC) and gradient-based adaptive single-tone spur cancellation scheme. By using the injection-locked ring oscillator, the TDC quantization step is automatically tracked with the period of the digitally controlled oscillator (DCO) over PVT, a... View full abstract»

• A 0.45-V Low-Power OOK/FSK RF Receiver in 0.18 $\mu\text{m}$ CMOS Technology for Implantable Medical Applications

Publication Year: 2016, Page(s):1123 - 1130
Cited by:  Papers (1)
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A 0.45-V low-power 0.18 μm CMOS OOK/FSK RF receiver for implantable medical applications is proposed. The receiver utilizes a wake-up mechanism to adjust its power consumption automatically by reading the amplitude of the input wireless OOK/FSK modulated RF signal directly. No additional wireless wake-up commands are required. Such a normally-off and instanton scheme reduces the power consu... View full abstract»

• Masked Dithering of MASH Digital Delta-Sigma Modulators with Constant Inputs Using Linear Feedback Shift Registers

Publication Year: 2016, Page(s):1131 - 1141
Cited by:  Papers (5)
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Digital delta-sigma modulators (DDSMs) are finite state machines; their spectra are characterized by strong periodic tones (so-called spurs) when they cycle repeatedly in time through a small number of states. This is particularly likely to happen when the input is constant or periodic. Dither generators based on linear feedback shift registers (LFSRs) are widely used to break up periodic cycles i... View full abstract»

• Practical Realization of Tunable Fractional Order Parallel Resonator and Fractional Order Filters

Publication Year: 2016, Page(s):1142 - 1151
Cited by:  Papers (11)
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This paper introduces a tunable fractional order parallel resonator (FOPR) whose resonating frequency can be tuned by the coefficient of a fractional order (FO) element (fractor). At the same time, its Q-factor can be set very high (theoretically infinite) by varying its resistor. Using this FOPR circuit, two simple FO filters (FO bandpass and FO notch) are also developed. The paper includes detai... View full abstract»

• A Voltage Regulator-Assisted Lightweight AES Implementation Against DPA Attacks

Publication Year: 2016, Page(s):1152 - 1163
Cited by:  Papers (5)
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In this paper, the mathematical foundations of the security implications of utilizing various on-chip voltage converters as a countermeasure against differential power analysis (DPA) attacks are investigated. An exhaustive mathematical analysis of a recently proposed converter-reshuffling (CoRe) technique is presented where measurement to disclose (MTD) is used to compare the security of the propo... View full abstract»

• A Charge-Recycling Assist Technique for Reliable and Low Power SRAM Design

Publication Year: 2016, Page(s):1164 - 1175
Cited by:  Papers (2)
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This paper presents a novel charge-recycling SRAM assist circuit to reduce the dynamic power consumption of SRAM assist technique. By collaboratively combining the read and write assist schemes, the wasted charge in conventional read assist circuit can be efficiently recycled in write assist technique. In order to compare the dynamic power consumption at ISO minimum operating voltage (VMIN View full abstract»

• Ultra-High Density Monolithic 3-D FinFET SRAM With Enhanced Read Stability

Publication Year: 2016, Page(s):1176 - 1187
Cited by:  Papers (1)
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FinFETs have begun replacing planar CMOS in the post-22 nm era because of their superior short-channel behavior. Though FinFETs will continue to extend Moore's law for the next few technology generations, 3-D vertical integration will enable more-than-Moore density increase by increasing the transistor count that can be accommodated in an IC package. Compared to conventional through-silicon-via (T... View full abstract»

• Testable MUTEX Design

Publication Year: 2016, Page(s):1188 - 1199
Cited by:  Papers (1)
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The mutual exclusion element is a fundamental component of asynchronous arbiters. Despite their importance, however, the testability of these components is typically limited to functional testing. This paper discusses why this is not sufficient and investigates three MUTEX implementations, two of which are completely new, that support the test of the metastability filter part of the components. Ad... View full abstract»

• Variable Latency Speculative Parallel Prefix Adders for Unsigned and Signed Operands

Publication Year: 2016, Page(s):1200 - 1209
Cited by:  Papers (3)
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A variable latency adder (VLA) reduces average addition time by using speculation: the exact arithmetic function is replaced by an approximated one, that is faster and gives correct results most of the times. When speculation fails, an error detection and correction circuit gives the correct result in the following clock cycle. Previous papers investigate VLAs based on Kogge-Stone, Han-Carlson or ... View full abstract»

Publication Year: 2016, Page(s):1210 - 1221
Cited by:  Papers (45)
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In this paper, we propose a new deadbeat dissipative filter with a finite impulse response (FIR) structure for linear discrete-time systems with external disturbance; this filter is called a deadbeat dissipative FIR filter (DDFF). The new filter ensures (Q, S, R)-α-dissipativity and the deadbeat property based on three slack matrix variables. By tuning the weighting parameters provided by t... View full abstract»

• Turing Patterns in Memristive Cellular Nonlinear Networks

Publication Year: 2016, Page(s):1222 - 1230
Cited by:  Papers (8)
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The formation of ordered structures, in particular Turing patterns, in complex spatially extended systems has been observed in many different contexts, spanning from natural sciences (chemistry, physics, and biology) to technology (mechanics and electronics). In this paper, it is shown that the use of memristors in a simple cell of a spatially-extended circuit architecture allows us to design syst... View full abstract»

• Modeling nonlinear wave digital elements using the Lambert function

Publication Year: 2016, Page(s):1231 - 1242
Cited by:  Papers (5)
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A large class of transcendental equations involving exponentials can be made explicit using the Lambert W function. In the last fifteen years, this powerful mathematical tool has been extensively used to find closed-form expressions for currents or voltages in circuits containing diodes. Until now almost all the studies about the W function in circuit analysis concern the Kirchhoff (K) domain, whi... View full abstract»

• Stability and Bifurcation Analysis of Arbitrarily High-Dimensional Genetic Regulatory Networks With Hub Structure and Bidirectional Coupling

Publication Year: 2016, Page(s):1243 - 1254
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This paper mainly studies the stability and Hopf bifurcation criteria of hub-based genetic regulatory networks with multiple delays and bidirectional couplings. The hub-structured network is an important motif in complex networks, which provides a new view angle on structure to describe the regulation mechanism between genes (including both mRNAs and proteins). It is well known that hubs play a le... View full abstract»

• SPICE Compact Modeling of Bipolar/Unipolar Memristor Switching Governed by Electrical Thresholds

Publication Year: 2016, Page(s):1255 - 1264
Cited by:  Papers (4)
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In this work, we propose a physical memristor/resistive switching device SPICE compact model, that is able to accurately fit both unipolar/bipolar devices settling to its current-voltage relationship. The proposed model is capable of reproducing essential device characteristics such as multilevel storage, temperature dependence, cycle/event handling and even the evolution of variability/parameter ... View full abstract»

• Model Predictive Flocking Control of the Cucker-Smale Multi-Agent Model With Input Constraints

Publication Year: 2016, Page(s):1265 - 1275
Cited by:  Papers (3)
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This paper develops a model predictive flocking control scheme for the Cucker-Smale multi-agent model with input constraints. A decentralized controller is designed based only on neighboring measurements. Connectivity conditions are established for guaranteeing the convergence to a rigid flock. Finally, numerical simulation demonstrates the effectiveness of the control scheme. View full abstract»

• Theoretical Comparison of Direct-Sampling Versus Heterodyne RF Receivers

Publication Year: 2016, Page(s):1276 - 1282
Cited by:  Papers (1)
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An intuitive high-level argument is presented suggesting that direct-sampling radio frequency (RF) receivers using Nyquist analog-digital converters can be as power-efficient as analog heterodyne receivers for equal dynamic range specifications, at least at lower RF frequencies well below the ft of the IC process. System planning for direct-sampling receivers is reviewed, highlighting d... View full abstract»

• A Scalable, Multimode SVD Precoding ASIC Based on the Cyclic Jacobi Method

Publication Year: 2016, Page(s):1283 - 1294
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Modern wireless communication standards define new high-throughput use cases like 8 x 8 multiple-input, multipleoutput (MIMO) antenna setups and a 256-QAM constellation alphabet in the case of IEEE 802.11ac. Baseband precoding at the transmitter is a key technique to achieve the corresponding data rates at a reasonable signal-to-noise ratio (SNR). Multimode capability, (i.e., the ability to suppor... View full abstract»

• Design and Implementation of High Throughput, Robust, Parallel M-QAM Demodulator in Digital Communication Receivers

Publication Year: 2016, Page(s):1295 - 1304
Cited by:  Papers (1)
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In this paper, an efficient all-digital demodulator in digital communication receivers is proposed and implemented on a reconfigurable hardware platform in order to compensate timing and carrier phase offset. In the proposed design, a feedforward architecture which has better stability and performance than traditional feedback architectures is used in the timing synchronization loop. To mitigate t... View full abstract»

• An Inductive-Coupling Blocker Rejection Technique for Miniature RFID Tag

Publication Year: 2016, Page(s):1305 - 1315
Cited by:  Papers (5)
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Miniaturization is a promising trend for future RF identification (RFID) in many applications such as the Internet of Things (IoT) and implantable devices. For a small-sized RFID tag using near-field communication, the reader is required to emit a large amount of RF power in order to power up the tag while simultaneously picking up a weak backscattering communication signal. This results in a very... View full abstract»

• Comment on “Subquadratic Space-Complexity Digit-Serial Multipliers Over $GF(2^{m})$ Using Generalized $(a, b)$-Way Karatsuba Algorithm”

Publication Year: 2016, Page(s):1316 - 1319
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In the literature, the generalized (a, b)-way Karatsuba algorithm (KA) is a well-known high-precision technique for implementing a subquadratic digit-serial multiplication. We present here the corrections to the space and complexities pertaining to addition operations in (a, b)-way KA approach. View full abstract»

• IEEE Transactions on Circuits and Systems—I:Regular Papers information for authors

Publication Year: 2016, Page(s): 1320
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• Special Issue on Circuits and Systems for the Internet of Things – From Sensing to Sensemaking

Publication Year: 2016, Page(s): 1321
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Aims & Scope

The theory, analysis, design, and practical implementations of circuits, and the application of circuit techniques to systems and to signal processing.

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Meet Our Editors

Editor-in-Chief
Andreas Demosthenous
Dept. Electronic & Electrical Engineering
University College London
London WC1E 7JE, UK